fb0d305dcb
- for exynos3250 : add assigned clock parents for CMU nodes - for exynos4412-odroid : add eMMC reset line - for exynos5250 : fixed typo for interrupt-cells - for exynos5250-snow : define stdout-path property : represent bridge and panel connection : enable wifi power-on and add cap-sdio-irq to wifi mmc node - for exynos5250-spring : define stdout-path property - for exynos5420 : fixed typo for interrupt-cells : add async-bridge clocks for gsc and disp1 PDs - for exynos5420 boards : Mux XMMCnDATA[0] pad correctly - for exynos5420-odroidxu3 : add eMMC reset line - for Peach boards : add HS400 support and define stdout-path property : add mclk entry and add WiFi module support : represent bridge and panel connection -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJVHDABAAoJEA0Cl+kVi2xqaasP/04A2twJLhYzqobi9fdNOv+U E14Z1qWv5XBnkkD4LewVCDTShVx+T6LDCAesJoaEcgK+ox8ZgcH4TlEslQ8pQdR5 3TjT1Tf/Qeldtri0Lb8jX9k7G6A+ogT1ywhMNUXTqLP3GFTgnIj/36MPlt22zYWp w006UXDwYLrjFkX99lQr1XpDhPnTv3H+72ZPdDlRk59wxFnymQ0gb4Ong8bbKd56 0/35bw/fhHMTAtSVjVl6j5yblDl4NSh3y+T7Ftt59TKBBfhD0JB7VaT3OXmNqX52 mdhnT5MAK+l0LjW6a2xkbq+xgNAqSFhpX1d4RWwKheSa9aF2usCZnWxwzqCkLioa v4O20gMlOkpq7pXduX+neJPgq1j1fls0ZlWKCTtgckmXCJQxdBkRYvuLeAz/QfGK JZu/awQMLo8ebs8UaH1+mkpGsUzVzW5aGBw0ROH8N27R8xCmqujxMr9k6g9TRDTO kFxIJAAsP1B/zEbvoI6LsPFPISBJjjjdOXClU72qrwNWuESWYsG71iI5PU6m2/bZ Eq2qWa1dkOh3Lp/FVW6zXEGk60I1+ghd7VBC3GhbzDb4L5RMqeuRtD41DHKp4i67 UhymfzXuzyC1FDzI8qwySm2GApGhwN2mJwXc4bdOkABznytLJ5GumE6jc13806+/ mnUb7ksYakVIJyjVCE88 =Sz8u -----END PGP SIGNATURE----- Merge tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt Merge "Samsung DT updates for v4.1" from Kukjin Kim: - for exynos3250 : add assigned clock parents for CMU nodes - for exynos4412-odroid : add eMMC reset line - for exynos5250 : fixed typo for interrupt-cells - for exynos5250-snow : define stdout-path property : represent bridge and panel connection : enable wifi power-on and add cap-sdio-irq to wifi mmc node - for exynos5250-spring : define stdout-path property - for exynos5420 : fixed typo for interrupt-cells : add async-bridge clocks for gsc and disp1 PDs - for exynos5420 boards : Mux XMMCnDATA[0] pad correctly - for exynos5420-odroidxu3 : add eMMC reset line - for Peach boards : add HS400 support and define stdout-path property : add mclk entry and add WiFi module support : represent bridge and panel connection * tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Fixed typo interrupt-cells for exynos5420 and exynos5250 ARM: dts: Add HS400 support for exynos5420 and exynos5800 ARM: dts: add async-bridge clocks to gsc power domain for exynos5420 ARM: dts: add async-bridge clocks to disp1 power domain for exynos5420 dt-bindings: add asynchronous bridge clock for exynos ARM: dts: Define stdout-path property for exynos5250-spring ARM: dts: Define stdout-path property for exynos5250-snow ARM: dts: Define stdout-path property for Peach boards ARM: dts: Add assigned clock parents to CMU node for exynos3250 ARM: dts: Add mclk entry for Peach boards ARM: dts: Add WiFi module support for Peach boards ARM: dts: Mux XMMCnDATA[0] pad correctly for Exynos5420 boards ARM: dts: add eMMC reset line for exynos5422-odroidxu3 ARM: dts: add eMMC reset line for exynos4412-odroid-common ARM: dts: represent bridge and panel connection for exynos5420-peach-pit ARM: dts: represent bridge and panel connection for exynos5250-snow ARM: dts: Add cap-sdio-irq to wifi mmc node for exynos5250-snow ARM: dts: Enable wifi power-on for exynos5250-snow Signed-off-by: Olof Johansson <olof@lixom.net>
53 lines
1.9 KiB
Plaintext
53 lines
1.9 KiB
Plaintext
* Samsung Exynos Power Domains
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Exynos processors include support for multiple power domains which are used
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to gate power to one or more peripherals on the processor.
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Required Properties:
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- compatible: should be one of the following.
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* samsung,exynos4210-pd - for exynos4210 type power domain.
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #power-domain-cells: number of cells in power domain specifier;
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must be 0.
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Optional Properties:
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- clocks: List of clock handles. The parent clocks of the input clocks to the
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devices in this power domain are set to oscclk before power gating
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and restored back after powering on a domain. This is required for
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all domains which are powered on and off and not required for unused
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domains.
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- clock-names: The following clocks can be specified:
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- oscclk: Oscillator clock.
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- pclkN, clkN: Pairs of parent of input clock and input clock to the
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devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
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are supported currently.
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- asbN: Clocks required by asynchronous bridges (ASB) present in
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the power domain. These clock should be enabled during power
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domain on/off operations.
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- power-domains: phandle pointing to the parent power domain, for more details
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see Documentation/devicetree/bindings/power/power_domain.txt
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Node of a device using power domains must have a power-domains property
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defined with a phandle to respective power domain.
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Example:
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lcd0: power-domain-lcd0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C00 0x10>;
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#power-domain-cells = <0>;
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};
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mfc_pd: power-domain@10044060 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044060 0x20>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
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<&clock CLK_MOUT_USER_ACLK333>;
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clock-names = "oscclk", "pclk0", "clk0";
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#power-domain-cells = <0>;
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};
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See Documentation/devicetree/bindings/power/power_domain.txt for description
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of consumer-side bindings.
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