forked from Minki/linux
fdd61a013a
Hierarchical IRQ domains can be used to stack different IRQ controllers on top of each other. Bring hierarchical IRQ domains into the GPIOLIB core with the following basic idea: Drivers that need their interrupts handled hierarchically specify a callback to translate the child hardware IRQ and IRQ type for each GPIO offset to a parent hardware IRQ and parent hardware IRQ type. Users have to pass the callback, fwnode, and parent irqdomain before calling gpiochip_irqchip_add(). We use the new method of just filling in the struct gpio_irq_chip before adding the gpiochip for all hierarchical irqchips of this type. The code path for device tree is pretty straight-forward, while the code path for old boardfiles or anything else will be more convoluted requireing upfront allocation of the interrupts when adding the chip. One specific use-case where this can be useful is if a power management controller has top-level controls for wakeup interrupts. In such cases, the power management controller can be a parent to other interrupt controllers and program additional registers when an IRQ has its wake capability enabled or disabled. The hierarchical irqchip helper code will only be available when IRQ_DOMAIN_HIERARCHY is selected to GPIO chips using this should select or depend on that symbol. When using hierarchical IRQs, the parent interrupt controller must also be hierarchical all the way up to the top interrupt controller wireing directly into the CPU, so on systems that do not have this we can get rid of all the extra code for supporting hierarchical irqs. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Jon Hunter <jonathanh@nvidia.com> Cc: Sowjanya Komatineni <skomatineni@nvidia.com> Cc: Bitan Biswas <bbiswas@nvidia.com> Cc: linux-tegra@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Brian Masney <masneyb@onstation.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Brian Masney <masneyb@onstation.org> Co-developed-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190808123242.5359-1-linus.walleij@linaro.org |
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80211 | ||
acpi | ||
backlight | ||
dmaengine | ||
driver-model | ||
early-userspace | ||
firmware | ||
fpga | ||
gpio | ||
i3c | ||
iio | ||
md | ||
mei | ||
memory-devices | ||
mmc | ||
mtd | ||
nfc | ||
nvdimm | ||
pci | ||
phy | ||
pm | ||
rapidio | ||
serial | ||
soundwire | ||
usb | ||
xilinx | ||
basics.rst | ||
bt8xxgpio.rst | ||
clk.rst | ||
component.rst | ||
conf.py | ||
connector.rst | ||
console.rst | ||
dcdbas.rst | ||
dell_rbu.rst | ||
device_connection.rst | ||
device_link.rst | ||
device-io.rst | ||
dma-buf.rst | ||
edac.rst | ||
edid.rst | ||
eisa.rst | ||
firewire.rst | ||
frame-buffer.rst | ||
generic-counter.rst | ||
hsi.rst | ||
i2c.rst | ||
index.rst | ||
infrastructure.rst | ||
input.rst | ||
interconnect.rst | ||
ipmb.rst | ||
isa.rst | ||
isapnp.rst | ||
libata.rst | ||
lightnvm-pblk.rst | ||
men-chameleon-bus.rst | ||
message-based.rst | ||
misc_devices.rst | ||
miscellaneous.rst | ||
mtdnand.rst | ||
ntb.rst | ||
nvmem.rst | ||
parport-lowlevel.rst | ||
pinctl.rst | ||
pps.rst | ||
pti_intel_mid.rst | ||
ptp.rst | ||
pwm.rst | ||
regulator.rst | ||
rfkill.rst | ||
s390-drivers.rst | ||
scsi.rst | ||
sgi-ioc4.rst | ||
slimbus.rst | ||
sm501.rst | ||
smsc_ece1099.rst | ||
sound.rst | ||
spi.rst | ||
switchtec.rst | ||
sync_file.rst | ||
target.rst | ||
uio-howto.rst | ||
vfio-mediated-device.rst | ||
vfio.rst | ||
vme.rst | ||
w1.rst | ||
xillybus.rst | ||
zorro.rst |