fd6fd38692
This adds the crypto nodes to the ipq4019 device tree, it also adds the BAM node used by crypto as well which the driver currently requires to operate properly The crypto driver itself depends on some other patches to qcom_bam_dma to function properly: https://lkml.org/lkml/2015/12/1/113 CC: Stanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
109 lines
2.4 KiB
Plaintext
109 lines
2.4 KiB
Plaintext
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "qcom-ipq4019.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
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compatible = "qcom,ipq4019";
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clocks {
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xo: xo {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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};
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soc {
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <1 2 0xf08>,
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<1 3 0xf08>,
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<1 4 0xf08>,
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<1 1 0xf08>;
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clock-frequency = <48000000>;
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};
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pinctrl@0x01000000 {
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serial_pins: serial_pinmux {
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mux {
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pins = "gpio60", "gpio61";
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function = "blsp_uart0";
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bias-disable;
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};
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};
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spi_0_pins: spi_0_pinmux {
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pinmux {
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function = "blsp_spi0";
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pins = "gpio55", "gpio56", "gpio57";
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio54";
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};
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pinconf {
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pins = "gpio55", "gpio56", "gpio57";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio54";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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};
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spi_0: spi@78b5000 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "ok";
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cs-gpios = <&tlmm 54 0>;
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mx25l25635e@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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compatible = "mx25l25635e";
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spi-max-frequency = <24000000>;
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};
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};
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serial@78af000 {
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pinctrl-0 = <&serial_pins>;
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pinctrl-names = "default";
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status = "ok";
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};
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cryptobam: dma@8e04000 {
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status = "ok";
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};
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crypto@8e3a000 {
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status = "ok";
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};
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watchdog@b017000 {
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status = "ok";
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};
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};
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};
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