forked from Minki/linux
fc56eb66c3
According to the architecture all instructions are suppressing if memory access is prohibited due to DAT protection, unless stated otherwise for an instruction. The lctl[g]/stctl[g] implementations handled this incorrectly since control register handling was done piecemeal, which means they had terminating instead of suppressing semantics. This patch fixes this. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
1008 lines
26 KiB
C
1008 lines
26 KiB
C
/*
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* handling privileged instructions
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*
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* Copyright IBM Corp. 2008, 2013
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License (version 2 only)
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* as published by the Free Software Foundation.
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*
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* Author(s): Carsten Otte <cotte@de.ibm.com>
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* Christian Borntraeger <borntraeger@de.ibm.com>
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*/
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#include <linux/kvm.h>
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#include <linux/gfp.h>
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#include <linux/errno.h>
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#include <linux/compat.h>
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#include <asm/asm-offsets.h>
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#include <asm/facility.h>
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#include <asm/current.h>
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#include <asm/debug.h>
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#include <asm/ebcdic.h>
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#include <asm/sysinfo.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/io.h>
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#include <asm/ptrace.h>
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#include <asm/compat.h>
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#include "gaccess.h"
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#include "kvm-s390.h"
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#include "trace.h"
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/* Handle SCK (SET CLOCK) interception */
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static int handle_set_clock(struct kvm_vcpu *vcpu)
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{
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struct kvm_vcpu *cpup;
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s64 hostclk, val;
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int i, rc;
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u64 op2;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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op2 = kvm_s390_get_base_disp_s(vcpu);
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if (op2 & 7) /* Operand must be on a doubleword boundary */
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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rc = read_guest(vcpu, op2, &val, sizeof(val));
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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if (store_tod_clock(&hostclk)) {
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kvm_s390_set_psw_cc(vcpu, 3);
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return 0;
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}
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val = (val - hostclk) & ~0x3fUL;
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mutex_lock(&vcpu->kvm->lock);
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kvm_for_each_vcpu(i, cpup, vcpu->kvm)
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cpup->arch.sie_block->epoch = val;
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mutex_unlock(&vcpu->kvm->lock);
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kvm_s390_set_psw_cc(vcpu, 0);
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return 0;
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}
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static int handle_set_prefix(struct kvm_vcpu *vcpu)
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{
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u64 operand2;
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u32 address;
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int rc;
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vcpu->stat.instruction_spx++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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/* must be word boundary */
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if (operand2 & 3)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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/* get the value */
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rc = read_guest(vcpu, operand2, &address, sizeof(address));
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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address &= 0x7fffe000u;
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/*
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* Make sure the new value is valid memory. We only need to check the
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* first page, since address is 8k aligned and memory pieces are always
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* at least 1MB aligned and have at least a size of 1MB.
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*/
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if (kvm_is_error_gpa(vcpu->kvm, address))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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kvm_s390_set_prefix(vcpu, address);
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VCPU_EVENT(vcpu, 5, "setting prefix to %x", address);
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trace_kvm_s390_handle_prefix(vcpu, 1, address);
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return 0;
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}
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static int handle_store_prefix(struct kvm_vcpu *vcpu)
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{
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u64 operand2;
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u32 address;
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int rc;
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vcpu->stat.instruction_stpx++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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/* must be word boundary */
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if (operand2 & 3)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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address = kvm_s390_get_prefix(vcpu);
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/* get the value */
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rc = write_guest(vcpu, operand2, &address, sizeof(address));
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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VCPU_EVENT(vcpu, 5, "storing prefix to %x", address);
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trace_kvm_s390_handle_prefix(vcpu, 0, address);
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return 0;
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}
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static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
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{
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u16 vcpu_id = vcpu->vcpu_id;
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u64 ga;
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int rc;
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vcpu->stat.instruction_stap++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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ga = kvm_s390_get_base_disp_s(vcpu);
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if (ga & 1)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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rc = write_guest(vcpu, ga, &vcpu_id, sizeof(vcpu_id));
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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VCPU_EVENT(vcpu, 5, "storing cpu address to %llx", ga);
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trace_kvm_s390_handle_stap(vcpu, ga);
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return 0;
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}
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static void __skey_check_enable(struct kvm_vcpu *vcpu)
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{
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if (!(vcpu->arch.sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)))
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return;
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s390_enable_skey();
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trace_kvm_s390_skey_related_inst(vcpu);
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vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE);
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}
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static int handle_skey(struct kvm_vcpu *vcpu)
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{
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__skey_check_enable(vcpu);
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vcpu->stat.instruction_storage_key++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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vcpu->arch.sie_block->gpsw.addr =
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__rewind_psw(vcpu->arch.sie_block->gpsw, 4);
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VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
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return 0;
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}
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static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
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{
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psw_t *psw = &vcpu->arch.sie_block->gpsw;
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vcpu->stat.instruction_ipte_interlock++;
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if (psw_bits(*psw).p)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
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psw->addr = __rewind_psw(*psw, 4);
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VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
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return 0;
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}
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static int handle_test_block(struct kvm_vcpu *vcpu)
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{
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gpa_t addr;
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int reg2;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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kvm_s390_get_regs_rre(vcpu, NULL, ®2);
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addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
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addr = kvm_s390_logical_to_effective(vcpu, addr);
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if (kvm_s390_check_low_addr_protection(vcpu, addr))
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return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
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addr = kvm_s390_real_to_abs(vcpu, addr);
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if (kvm_is_error_gpa(vcpu->kvm, addr))
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return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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/*
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* We don't expect errors on modern systems, and do not care
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* about storage keys (yet), so let's just clear the page.
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*/
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if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
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return -EFAULT;
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kvm_s390_set_psw_cc(vcpu, 0);
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vcpu->run->s.regs.gprs[0] = 0;
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return 0;
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}
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static int handle_tpi(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_interrupt_info *inti;
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unsigned long len;
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u32 tpi_data[3];
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int cc, rc;
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u64 addr;
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rc = 0;
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addr = kvm_s390_get_base_disp_s(vcpu);
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if (addr & 3)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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cc = 0;
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inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
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if (!inti)
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goto no_interrupt;
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cc = 1;
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tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
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tpi_data[1] = inti->io.io_int_parm;
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tpi_data[2] = inti->io.io_int_word;
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if (addr) {
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/*
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* Store the two-word I/O interruption code into the
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* provided area.
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*/
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len = sizeof(tpi_data) - 4;
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rc = write_guest(vcpu, addr, &tpi_data, len);
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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} else {
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/*
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* Store the three-word I/O interruption code into
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* the appropriate lowcore area.
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*/
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len = sizeof(tpi_data);
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if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len))
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rc = -EFAULT;
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}
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/*
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* If we encounter a problem storing the interruption code, the
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* instruction is suppressed from the guest's view: reinject the
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* interrupt.
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*/
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if (!rc)
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kfree(inti);
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else
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kvm_s390_reinject_io_int(vcpu->kvm, inti);
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no_interrupt:
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/* Set condition code and we're done. */
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if (!rc)
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kvm_s390_set_psw_cc(vcpu, cc);
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return rc ? -EFAULT : 0;
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}
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static int handle_tsch(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_interrupt_info *inti;
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inti = kvm_s390_get_io_int(vcpu->kvm, 0,
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vcpu->run->s.regs.gprs[1]);
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/*
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* Prepare exit to userspace.
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* We indicate whether we dequeued a pending I/O interrupt
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* so that userspace can re-inject it if the instruction gets
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* a program check. While this may re-order the pending I/O
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* interrupts, this is no problem since the priority is kept
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* intact.
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*/
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vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
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vcpu->run->s390_tsch.dequeued = !!inti;
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if (inti) {
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vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
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vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
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vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
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vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
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}
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vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
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kfree(inti);
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return -EREMOTE;
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}
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static int handle_io_inst(struct kvm_vcpu *vcpu)
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{
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VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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if (vcpu->kvm->arch.css_support) {
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/*
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* Most I/O instructions will be handled by userspace.
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* Exceptions are tpi and the interrupt portion of tsch.
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*/
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if (vcpu->arch.sie_block->ipa == 0xb236)
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return handle_tpi(vcpu);
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if (vcpu->arch.sie_block->ipa == 0xb235)
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return handle_tsch(vcpu);
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/* Handle in userspace. */
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return -EOPNOTSUPP;
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} else {
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/*
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* Set condition code 3 to stop the guest from issuing channel
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* I/O instructions.
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*/
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kvm_s390_set_psw_cc(vcpu, 3);
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return 0;
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}
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}
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static int handle_stfl(struct kvm_vcpu *vcpu)
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{
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int rc;
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vcpu->stat.instruction_stfl++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list),
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vfacilities, 4);
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if (rc)
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return rc;
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VCPU_EVENT(vcpu, 5, "store facility list value %x",
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*(unsigned int *) vfacilities);
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trace_kvm_s390_handle_stfl(vcpu, *(unsigned int *) vfacilities);
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return 0;
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}
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#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
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#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
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#define PSW_ADDR_24 0x0000000000ffffffUL
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#define PSW_ADDR_31 0x000000007fffffffUL
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int is_valid_psw(psw_t *psw)
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{
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if (psw->mask & PSW_MASK_UNASSIGNED)
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return 0;
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if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
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if (psw->addr & ~PSW_ADDR_31)
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return 0;
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}
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if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
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return 0;
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if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
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return 0;
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if (psw->addr & 1)
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return 0;
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return 1;
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}
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int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
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{
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psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
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psw_compat_t new_psw;
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u64 addr;
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int rc;
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if (gpsw->mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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addr = kvm_s390_get_base_disp_s(vcpu);
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if (addr & 7)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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rc = read_guest(vcpu, addr, &new_psw, sizeof(new_psw));
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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if (!(new_psw.mask & PSW32_MASK_BASE))
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
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gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
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gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
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if (!is_valid_psw(gpsw))
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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return 0;
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}
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static int handle_lpswe(struct kvm_vcpu *vcpu)
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{
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psw_t new_psw;
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u64 addr;
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int rc;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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addr = kvm_s390_get_base_disp_s(vcpu);
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if (addr & 7)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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rc = read_guest(vcpu, addr, &new_psw, sizeof(new_psw));
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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vcpu->arch.sie_block->gpsw = new_psw;
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if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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return 0;
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}
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static int handle_stidp(struct kvm_vcpu *vcpu)
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{
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u64 stidp_data = vcpu->arch.stidp_data;
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u64 operand2;
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int rc;
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vcpu->stat.instruction_stidp++;
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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operand2 = kvm_s390_get_base_disp_s(vcpu);
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if (operand2 & 7)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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rc = write_guest(vcpu, operand2, &stidp_data, sizeof(stidp_data));
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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VCPU_EVENT(vcpu, 5, "%s", "store cpu id");
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return 0;
|
|
}
|
|
|
|
static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
|
|
{
|
|
int cpus = 0;
|
|
int n;
|
|
|
|
cpus = atomic_read(&vcpu->kvm->online_vcpus);
|
|
|
|
/* deal with other level 3 hypervisors */
|
|
if (stsi(mem, 3, 2, 2))
|
|
mem->count = 0;
|
|
if (mem->count < 8)
|
|
mem->count++;
|
|
for (n = mem->count - 1; n > 0 ; n--)
|
|
memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
|
|
|
|
mem->vm[0].cpus_total = cpus;
|
|
mem->vm[0].cpus_configured = cpus;
|
|
mem->vm[0].cpus_standby = 0;
|
|
mem->vm[0].cpus_reserved = 0;
|
|
mem->vm[0].caf = 1000;
|
|
memcpy(mem->vm[0].name, "KVMguest", 8);
|
|
ASCEBC(mem->vm[0].name, 8);
|
|
memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
|
|
ASCEBC(mem->vm[0].cpi, 16);
|
|
}
|
|
|
|
static int handle_stsi(struct kvm_vcpu *vcpu)
|
|
{
|
|
int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
|
|
int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
|
|
int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
|
|
unsigned long mem = 0;
|
|
u64 operand2;
|
|
int rc = 0;
|
|
|
|
vcpu->stat.instruction_stsi++;
|
|
VCPU_EVENT(vcpu, 4, "stsi: fc: %x sel1: %x sel2: %x", fc, sel1, sel2);
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
if (fc > 3) {
|
|
kvm_s390_set_psw_cc(vcpu, 3);
|
|
return 0;
|
|
}
|
|
|
|
if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
|
|
|| vcpu->run->s.regs.gprs[1] & 0xffff0000)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
if (fc == 0) {
|
|
vcpu->run->s.regs.gprs[0] = 3 << 28;
|
|
kvm_s390_set_psw_cc(vcpu, 0);
|
|
return 0;
|
|
}
|
|
|
|
operand2 = kvm_s390_get_base_disp_s(vcpu);
|
|
|
|
if (operand2 & 0xfff)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
switch (fc) {
|
|
case 1: /* same handling for 1 and 2 */
|
|
case 2:
|
|
mem = get_zeroed_page(GFP_KERNEL);
|
|
if (!mem)
|
|
goto out_no_data;
|
|
if (stsi((void *) mem, fc, sel1, sel2))
|
|
goto out_no_data;
|
|
break;
|
|
case 3:
|
|
if (sel1 != 2 || sel2 != 2)
|
|
goto out_no_data;
|
|
mem = get_zeroed_page(GFP_KERNEL);
|
|
if (!mem)
|
|
goto out_no_data;
|
|
handle_stsi_3_2_2(vcpu, (void *) mem);
|
|
break;
|
|
}
|
|
|
|
rc = write_guest(vcpu, operand2, (void *)mem, PAGE_SIZE);
|
|
if (rc) {
|
|
rc = kvm_s390_inject_prog_cond(vcpu, rc);
|
|
goto out;
|
|
}
|
|
trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
|
|
free_page(mem);
|
|
kvm_s390_set_psw_cc(vcpu, 0);
|
|
vcpu->run->s.regs.gprs[0] = 0;
|
|
return 0;
|
|
out_no_data:
|
|
kvm_s390_set_psw_cc(vcpu, 3);
|
|
out:
|
|
free_page(mem);
|
|
return rc;
|
|
}
|
|
|
|
static const intercept_handler_t b2_handlers[256] = {
|
|
[0x02] = handle_stidp,
|
|
[0x04] = handle_set_clock,
|
|
[0x10] = handle_set_prefix,
|
|
[0x11] = handle_store_prefix,
|
|
[0x12] = handle_store_cpu_address,
|
|
[0x21] = handle_ipte_interlock,
|
|
[0x29] = handle_skey,
|
|
[0x2a] = handle_skey,
|
|
[0x2b] = handle_skey,
|
|
[0x2c] = handle_test_block,
|
|
[0x30] = handle_io_inst,
|
|
[0x31] = handle_io_inst,
|
|
[0x32] = handle_io_inst,
|
|
[0x33] = handle_io_inst,
|
|
[0x34] = handle_io_inst,
|
|
[0x35] = handle_io_inst,
|
|
[0x36] = handle_io_inst,
|
|
[0x37] = handle_io_inst,
|
|
[0x38] = handle_io_inst,
|
|
[0x39] = handle_io_inst,
|
|
[0x3a] = handle_io_inst,
|
|
[0x3b] = handle_io_inst,
|
|
[0x3c] = handle_io_inst,
|
|
[0x50] = handle_ipte_interlock,
|
|
[0x5f] = handle_io_inst,
|
|
[0x74] = handle_io_inst,
|
|
[0x76] = handle_io_inst,
|
|
[0x7d] = handle_stsi,
|
|
[0xb1] = handle_stfl,
|
|
[0xb2] = handle_lpswe,
|
|
};
|
|
|
|
int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
/*
|
|
* A lot of B2 instructions are priviledged. Here we check for
|
|
* the privileged ones, that we can handle in the kernel.
|
|
* Anything else goes to userspace.
|
|
*/
|
|
handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_epsw(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1, reg2;
|
|
|
|
kvm_s390_get_regs_rre(vcpu, ®1, ®2);
|
|
|
|
/* This basically extracts the mask half of the psw. */
|
|
vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
|
|
vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
|
|
if (reg2) {
|
|
vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
|
|
vcpu->run->s.regs.gprs[reg2] |=
|
|
vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#define PFMF_RESERVED 0xfffc0101UL
|
|
#define PFMF_SK 0x00020000UL
|
|
#define PFMF_CF 0x00010000UL
|
|
#define PFMF_UI 0x00008000UL
|
|
#define PFMF_FSC 0x00007000UL
|
|
#define PFMF_NQ 0x00000800UL
|
|
#define PFMF_MR 0x00000400UL
|
|
#define PFMF_MC 0x00000200UL
|
|
#define PFMF_KEY 0x000000feUL
|
|
|
|
static int handle_pfmf(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1, reg2;
|
|
unsigned long start, end;
|
|
|
|
vcpu->stat.instruction_pfmf++;
|
|
|
|
kvm_s390_get_regs_rre(vcpu, ®1, ®2);
|
|
|
|
if (!MACHINE_HAS_PFMF)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
/* Only provide non-quiescing support if the host supports it */
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && !test_facility(14))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
/* No support for conditional-SSKE */
|
|
if (vcpu->run->s.regs.gprs[reg1] & (PFMF_MR | PFMF_MC))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
|
|
if (kvm_s390_check_low_addr_protection(vcpu, start))
|
|
return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
|
|
}
|
|
|
|
switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
|
|
case 0x00000000:
|
|
end = (start + (1UL << 12)) & ~((1UL << 12) - 1);
|
|
break;
|
|
case 0x00001000:
|
|
end = (start + (1UL << 20)) & ~((1UL << 20) - 1);
|
|
break;
|
|
/* We dont support EDAT2
|
|
case 0x00002000:
|
|
end = (start + (1UL << 31)) & ~((1UL << 31) - 1);
|
|
break;*/
|
|
default:
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
}
|
|
while (start < end) {
|
|
unsigned long useraddr, abs_addr;
|
|
|
|
/* Translate guest address to host address */
|
|
if ((vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) == 0)
|
|
abs_addr = kvm_s390_real_to_abs(vcpu, start);
|
|
else
|
|
abs_addr = start;
|
|
useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(abs_addr));
|
|
if (kvm_is_error_hva(useraddr))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
|
|
if (clear_user((void __user *)useraddr, PAGE_SIZE))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
}
|
|
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
|
|
__skey_check_enable(vcpu);
|
|
if (set_guest_storage_key(current->mm, useraddr,
|
|
vcpu->run->s.regs.gprs[reg1] & PFMF_KEY,
|
|
vcpu->run->s.regs.gprs[reg1] & PFMF_NQ))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
}
|
|
|
|
start += PAGE_SIZE;
|
|
}
|
|
if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC)
|
|
vcpu->run->s.regs.gprs[reg2] = end;
|
|
return 0;
|
|
}
|
|
|
|
static int handle_essa(struct kvm_vcpu *vcpu)
|
|
{
|
|
/* entries expected to be 1FF */
|
|
int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
|
|
unsigned long *cbrlo, cbrle;
|
|
struct gmap *gmap;
|
|
int i;
|
|
|
|
VCPU_EVENT(vcpu, 5, "cmma release %d pages", entries);
|
|
gmap = vcpu->arch.gmap;
|
|
vcpu->stat.instruction_essa++;
|
|
if (!kvm_s390_cmma_enabled(vcpu->kvm))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
if (((vcpu->arch.sie_block->ipb & 0xf0000000) >> 28) > 6)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
/* Rewind PSW to repeat the ESSA instruction */
|
|
vcpu->arch.sie_block->gpsw.addr =
|
|
__rewind_psw(vcpu->arch.sie_block->gpsw, 4);
|
|
vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
|
|
cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
|
|
down_read(&gmap->mm->mmap_sem);
|
|
for (i = 0; i < entries; ++i) {
|
|
cbrle = cbrlo[i];
|
|
if (unlikely(cbrle & ~PAGE_MASK || cbrle < 2 * PAGE_SIZE))
|
|
/* invalid entry */
|
|
break;
|
|
/* try to free backing */
|
|
__gmap_zap(gmap, cbrle);
|
|
}
|
|
up_read(&gmap->mm->mmap_sem);
|
|
if (i < entries)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
return 0;
|
|
}
|
|
|
|
static const intercept_handler_t b9_handlers[256] = {
|
|
[0x8a] = handle_ipte_interlock,
|
|
[0x8d] = handle_epsw,
|
|
[0x8e] = handle_ipte_interlock,
|
|
[0x8f] = handle_ipte_interlock,
|
|
[0xab] = handle_essa,
|
|
[0xaf] = handle_pfmf,
|
|
};
|
|
|
|
int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
/* This is handled just as for the B2 instructions. */
|
|
handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
|
|
int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
|
|
int reg, rc, nr_regs;
|
|
u32 ctl_array[16];
|
|
u64 ga;
|
|
|
|
vcpu->stat.instruction_lctl++;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
ga = kvm_s390_get_base_disp_rs(vcpu);
|
|
|
|
if (ga & 3)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
VCPU_EVENT(vcpu, 5, "lctl r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
|
|
trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
|
|
|
|
nr_regs = ((reg3 - reg1) & 0xf) + 1;
|
|
rc = read_guest(vcpu, ga, ctl_array, nr_regs * sizeof(u32));
|
|
if (rc)
|
|
return kvm_s390_inject_prog_cond(vcpu, rc);
|
|
reg = reg1;
|
|
nr_regs = 0;
|
|
do {
|
|
vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
|
|
vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
|
|
if (reg == reg3)
|
|
break;
|
|
reg = (reg + 1) % 16;
|
|
} while (1);
|
|
kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
|
|
return 0;
|
|
}
|
|
|
|
int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
|
|
int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
|
|
int reg, rc, nr_regs;
|
|
u32 ctl_array[16];
|
|
u64 ga;
|
|
|
|
vcpu->stat.instruction_stctl++;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
ga = kvm_s390_get_base_disp_rs(vcpu);
|
|
|
|
if (ga & 3)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
VCPU_EVENT(vcpu, 5, "stctl r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
|
|
trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);
|
|
|
|
reg = reg1;
|
|
nr_regs = 0;
|
|
do {
|
|
ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
|
|
if (reg == reg3)
|
|
break;
|
|
reg = (reg + 1) % 16;
|
|
} while (1);
|
|
rc = write_guest(vcpu, ga, ctl_array, nr_regs * sizeof(u32));
|
|
return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
|
|
}
|
|
|
|
static int handle_lctlg(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
|
|
int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
|
|
int reg, rc, nr_regs;
|
|
u64 ctl_array[16];
|
|
u64 ga;
|
|
|
|
vcpu->stat.instruction_lctlg++;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
ga = kvm_s390_get_base_disp_rsy(vcpu);
|
|
|
|
if (ga & 7)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
VCPU_EVENT(vcpu, 5, "lctlg r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
|
|
trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
|
|
|
|
nr_regs = ((reg3 - reg1) & 0xf) + 1;
|
|
rc = read_guest(vcpu, ga, ctl_array, nr_regs * sizeof(u64));
|
|
if (rc)
|
|
return kvm_s390_inject_prog_cond(vcpu, rc);
|
|
reg = reg1;
|
|
nr_regs = 0;
|
|
do {
|
|
vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
|
|
if (reg == reg3)
|
|
break;
|
|
reg = (reg + 1) % 16;
|
|
} while (1);
|
|
kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
|
|
return 0;
|
|
}
|
|
|
|
static int handle_stctg(struct kvm_vcpu *vcpu)
|
|
{
|
|
int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
|
|
int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
|
|
int reg, rc, nr_regs;
|
|
u64 ctl_array[16];
|
|
u64 ga;
|
|
|
|
vcpu->stat.instruction_stctg++;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
ga = kvm_s390_get_base_disp_rsy(vcpu);
|
|
|
|
if (ga & 7)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
VCPU_EVENT(vcpu, 5, "stctg r1:%x, r3:%x, addr:%llx", reg1, reg3, ga);
|
|
trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);
|
|
|
|
reg = reg1;
|
|
nr_regs = 0;
|
|
do {
|
|
ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
|
|
if (reg == reg3)
|
|
break;
|
|
reg = (reg + 1) % 16;
|
|
} while (1);
|
|
rc = write_guest(vcpu, ga, ctl_array, nr_regs * sizeof(u64));
|
|
return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
|
|
}
|
|
|
|
static const intercept_handler_t eb_handlers[256] = {
|
|
[0x2f] = handle_lctlg,
|
|
[0x25] = handle_stctg,
|
|
};
|
|
|
|
int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_tprot(struct kvm_vcpu *vcpu)
|
|
{
|
|
u64 address1, address2;
|
|
unsigned long hva, gpa;
|
|
int ret = 0, cc = 0;
|
|
bool writable;
|
|
|
|
vcpu->stat.instruction_tprot++;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
kvm_s390_get_base_disp_sse(vcpu, &address1, &address2);
|
|
|
|
/* we only handle the Linux memory detection case:
|
|
* access key == 0
|
|
* everything else goes to userspace. */
|
|
if (address2 & 0xf0)
|
|
return -EOPNOTSUPP;
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
|
|
ipte_lock(vcpu);
|
|
ret = guest_translate_address(vcpu, address1, &gpa, 1);
|
|
if (ret == PGM_PROTECTION) {
|
|
/* Write protected? Try again with read-only... */
|
|
cc = 1;
|
|
ret = guest_translate_address(vcpu, address1, &gpa, 0);
|
|
}
|
|
if (ret) {
|
|
if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
|
|
ret = kvm_s390_inject_program_int(vcpu, ret);
|
|
} else if (ret > 0) {
|
|
/* Translation not available */
|
|
kvm_s390_set_psw_cc(vcpu, 3);
|
|
ret = 0;
|
|
}
|
|
goto out_unlock;
|
|
}
|
|
|
|
hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
|
|
if (kvm_is_error_hva(hva)) {
|
|
ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
|
|
} else {
|
|
if (!writable)
|
|
cc = 1; /* Write not permitted ==> read-only */
|
|
kvm_s390_set_psw_cc(vcpu, cc);
|
|
/* Note: CC2 only occurs for storage keys (not supported yet) */
|
|
}
|
|
out_unlock:
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
|
|
ipte_unlock(vcpu);
|
|
return ret;
|
|
}
|
|
|
|
int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
|
|
{
|
|
/* For e5xx... instructions we only handle TPROT */
|
|
if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
|
|
return handle_tprot(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int handle_sckpf(struct kvm_vcpu *vcpu)
|
|
{
|
|
u32 value;
|
|
|
|
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
|
|
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
|
|
|
|
if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
|
|
return kvm_s390_inject_program_int(vcpu,
|
|
PGM_SPECIFICATION);
|
|
|
|
value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
|
|
vcpu->arch.sie_block->todpr = value;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const intercept_handler_t x01_handlers[256] = {
|
|
[0x07] = handle_sckpf,
|
|
};
|
|
|
|
int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
|
|
{
|
|
intercept_handler_t handler;
|
|
|
|
handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
|
|
if (handler)
|
|
return handler(vcpu);
|
|
return -EOPNOTSUPP;
|
|
}
|