forked from Minki/linux
dff2ab16ac
This patch sets bit 0 in the startup address passed to the secondary CPUs so that they branch into Thumb-2 mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
225 lines
5.2 KiB
C
225 lines
5.2 KiB
C
/*
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* linux/arch/arm/mach-realview/platsmp.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/jiffies.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/cacheflush.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/localtimer.h>
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#include <asm/unified.h>
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#include <mach/board-eb.h>
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#include <mach/board-pb11mp.h>
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#include <mach/board-pbx.h>
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#include <asm/smp_scu.h>
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#include "core.h"
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extern void realview_secondary_startup(void);
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/*
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* control for which core is the next to come out of the secondary
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* boot "holding pen"
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*/
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volatile int __cpuinitdata pen_release = -1;
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static void __iomem *scu_base_addr(void)
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{
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if (machine_is_realview_eb_mp())
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return __io_address(REALVIEW_EB11MP_SCU_BASE);
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else if (machine_is_realview_pb11mp())
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return __io_address(REALVIEW_TC11MP_SCU_BASE);
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else if (machine_is_realview_pbx() &&
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(core_tile_pbx11mp() || core_tile_pbxa9mp()))
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return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
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else
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return (void __iomem *)0;
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}
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static inline unsigned int get_core_count(void)
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{
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void __iomem *scu_base = scu_base_addr();
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if (scu_base)
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return scu_get_core_count(scu_base);
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return 1;
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}
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static DEFINE_SPINLOCK(boot_lock);
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void __cpuinit platform_secondary_init(unsigned int cpu)
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{
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trace_hardirqs_off();
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/*
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* if any interrupts are already enabled for the primary
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* core (e.g. timer irq), then they will not have been enabled
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* for us: do so
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*/
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gic_cpu_init(0, gic_cpu_base_addr);
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/*
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* let the primary processor know we're out of the
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* pen, then head off into the C entry point
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*/
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pen_release = -1;
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smp_wmb();
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/*
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* Synchronise with the boot thread.
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*/
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spin_lock(&boot_lock);
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spin_unlock(&boot_lock);
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}
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int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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unsigned long timeout;
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/*
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* set synchronisation state between this boot processor
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* and the secondary one
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*/
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spin_lock(&boot_lock);
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/*
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* The secondary processor is waiting to be released from
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* the holding pen - release it, then wait for it to flag
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* that it has been released by resetting pen_release.
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*
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* Note that "pen_release" is the hardware CPU ID, whereas
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* "cpu" is Linux's internal ID.
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*/
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pen_release = cpu;
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flush_cache_all();
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/*
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* XXX
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*
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* This is a later addition to the booting protocol: the
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* bootMonitor now puts secondary cores into WFI, so
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* poke_milo() no longer gets the cores moving; we need
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* to send a soft interrupt to wake the secondary core.
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* Use smp_cross_call() for this, since there's little
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* point duplicating the code here
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*/
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smp_cross_call(cpumask_of(cpu));
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timeout = jiffies + (1 * HZ);
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while (time_before(jiffies, timeout)) {
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smp_rmb();
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if (pen_release == -1)
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break;
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udelay(10);
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}
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/*
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* now the secondary core is starting up let it run its
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* calibrations, then wait for it to finish
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*/
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spin_unlock(&boot_lock);
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return pen_release != -1 ? -ENOSYS : 0;
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}
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static void __init poke_milo(void)
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{
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/* nobody is to be released from the pen yet */
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pen_release = -1;
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/*
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* Write the address of secondary startup into the system-wide flags
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* register. The BootMonitor waits for this register to become
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* non-zero.
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*/
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#define REALVIEW_SYS_FLAGSS_OFFSET 0x30
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#define REALVIEW_SYS_FLAGSC_OFFSET 0x34
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__raw_writel(BSYM(virt_to_phys(realview_secondary_startup)),
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__io_address(REALVIEW_SYS_BASE) +
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REALVIEW_SYS_FLAGSS_OFFSET);
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mb();
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}
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/*
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* Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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*/
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void __init smp_init_cpus(void)
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{
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unsigned int i, ncores = get_core_count();
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for (i = 0; i < ncores; i++)
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set_cpu_possible(i, true);
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}
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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unsigned int ncores = get_core_count();
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unsigned int cpu = smp_processor_id();
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int i;
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/* sanity check */
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if (ncores == 0) {
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printk(KERN_ERR
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"Realview: strange CM count of 0? Default to 1\n");
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ncores = 1;
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}
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if (ncores > NR_CPUS) {
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printk(KERN_WARNING
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"Realview: no. of cores (%d) greater than configured "
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"maximum of %d - clipping\n",
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ncores, NR_CPUS);
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ncores = NR_CPUS;
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}
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smp_store_cpu_info(cpu);
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/*
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* are we trying to boot more cores than exist?
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*/
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if (max_cpus > ncores)
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max_cpus = ncores;
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/*
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* Initialise the present map, which describes the set of CPUs
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* actually populated at the present time.
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*/
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for (i = 0; i < max_cpus; i++)
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set_cpu_present(i, true);
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/*
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* Initialise the SCU if there are more than one CPU and let
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* them know where to start. Note that, on modern versions of
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* MILO, the "poke" doesn't actually do anything until each
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* individual core is sent a soft interrupt to get it out of
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* WFI
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*/
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if (max_cpus > 1) {
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/*
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* Enable the local timer or broadcast device for the
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* boot CPU, but only if we have more than one CPU.
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*/
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percpu_timer_setup();
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scu_enable(scu_base_addr());
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poke_milo();
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}
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}
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