linux/drivers/gpu/drm/msm
Jordan Crouse fb03998192 drm/msm: Add adreno_gpu_write64()
Add a new generic function to write a "64" bit value. This isn't
actually a 64 bit operation, it just writes the upper and lower
32 bit of a 64 bit value to a specified LO and HI register.  If
a particular target doesn't support one of the registers it can
mark that register as SKIP and writes/reads from that register
will be quietly dropped.

This can be immediately put in place for the ringbuffer base and
the RPTR address.  Both writes are converted to use
adreno_gpu_write64() with their respective high and low registers
and the high register appropriately marked as SKIP for both 32 bit
targets (a3xx and a4xx). When a5xx comes it will define valid target
registers for the 'hi' option and everything else will just work.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-11-28 15:14:12 -05:00
..
adreno drm/msm: Add adreno_gpu_write64() 2016-11-28 15:14:12 -05:00
dsi drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
edp drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
hdmi drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
mdp drm/msm: update generated headers 2016-11-28 15:14:10 -05:00
Kconfig drm/msm: submit support for in-fences 2016-09-15 17:39:49 -04:00
Makefile drm/msm/mdp5: introduce mdp5_hw_pipe 2016-11-27 11:32:20 -05:00
msm_atomic.c drm/msm: subclass drm_atomic_state 2016-11-27 11:32:27 -05:00
msm_debugfs.c drm/msm/mdp5: add debugfs to show smp block status 2016-11-27 11:32:34 -05:00
msm_debugfs.h drm/msm: move debugfs code to it's own file 2016-05-08 10:16:02 -04:00
msm_drv.c drm/msm: set dma_mask properly 2016-11-27 11:35:07 -05:00
msm_drv.h drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_fb.c drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_fbdev.c drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_fence.c dma-buf: Rename struct fence to dma_fence 2016-10-25 14:40:39 +02:00
msm_fence.h dma-buf: Rename struct fence to dma_fence 2016-10-25 14:40:39 +02:00
msm_gem_prime.c drm/msm: change gem->vmap() to get/put 2016-07-16 10:09:07 -04:00
msm_gem_shrinker.c drm/msm: wire up vmap shrinker 2016-07-16 10:09:07 -04:00
msm_gem_submit.c drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_gem_vma.c drm/msm: support multiple address spaces 2016-11-27 11:23:09 -05:00
msm_gem.c drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_gem.h drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_gpu.c drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_gpu.h drm/msm: gpu Add new gpu register read/write functions 2016-11-28 15:14:12 -05:00
msm_iommu.c drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_kms.h drm/msm/mdp5: add debugfs to show smp block status 2016-11-27 11:32:34 -05:00
msm_mmu.h drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_perf.c gpu: use %pd 2016-08-07 23:38:48 -04:00
msm_rd.c drm/msm/rd: support for 64b iova 2016-11-28 15:14:08 -05:00
msm_ringbuffer.c drm/msm: change gem->vmap() to get/put 2016-07-16 10:09:07 -04:00
msm_ringbuffer.h
NOTES