32c6c01b0e
CLPS711X CPUs have 128 bytes of on-chip Boot ROM with an instruction sequence that configure UART1 to receive up to 2 Kbytes of serial data which is then placed in the on-chip SRAM. Once the download is complete, the program counter jumps to SRAM to begin executed the downloaded data. The purpose of this mode is to allow the downloaded code to facilitate programming of FLASH or other ROM device. Selection of the internal Boot ROM is accomplished at power-on-reset time. No reason to keep this special (develop only) mode in the kernel. This patch removes EP72XX_ROM_BOOT kernel symbol. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
57 lines
2.0 KiB
C
57 lines
2.0 KiB
C
/*
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* arch/arm/mach-clps711x/include/mach/hardware.h
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*
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* This file contains the hardware definitions of the Prospector P720T.
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*
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __MACH_HARDWARE_H
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#define __MACH_HARDWARE_H
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#include <mach/clps711x.h>
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#define IO_ADDRESS(x) (0xdc000000 + (((x) & 0x03ffffff) | \
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(((x) >> 2) & 0x3c000000)))
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#define CLPS711X_VIRT_BASE IOMEM(IO_ADDRESS(CLPS711X_PHYS_BASE))
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#ifndef __ASSEMBLY__
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#define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off))
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#define clps_readw(off) readw(CLPS711X_VIRT_BASE + (off))
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#define clps_readl(off) readl(CLPS711X_VIRT_BASE + (off))
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#define clps_writeb(val,off) writeb(val, CLPS711X_VIRT_BASE + (off))
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#define clps_writew(val,off) writew(val, CLPS711X_VIRT_BASE + (off))
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#define clps_writel(val,off) writel(val, CLPS711X_VIRT_BASE + (off))
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#endif
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#define CS0_PHYS_BASE (0x00000000)
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#define CS1_PHYS_BASE (0x10000000)
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#define CS2_PHYS_BASE (0x20000000)
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#define CS3_PHYS_BASE (0x30000000)
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#define CS4_PHYS_BASE (0x40000000)
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#define CS5_PHYS_BASE (0x50000000)
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#define CS6_PHYS_BASE (0x60000000)
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#define CS7_PHYS_BASE (0x70000000)
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#define CLPS711X_SRAM_BASE CS6_PHYS_BASE
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#define CLPS711X_SRAM_SIZE (48 * 1024)
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#define CLPS711X_SDRAM0_BASE (0xc0000000)
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#define CLPS711X_SDRAM1_BASE (0xd0000000)
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#endif
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