forked from Minki/linux
a364143127
add csp security hardware headers Signed-off-by: Leo Chen <leochen@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
101 lines
3.6 KiB
C
101 lines
3.6 KiB
C
/*****************************************************************************
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* Copyright 2003 - 2008 Broadcom Corporation. All rights reserved.
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available at
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* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a
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* license other than the GPL, without Broadcom's express prior written
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* consent.
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*****************************************************************************/
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/****************************************************************************/
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/**
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* @file secHw_def.h
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*
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* @brief Definitions for configuring/testing secure blocks
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*
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* @note
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* None
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*/
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/****************************************************************************/
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#ifndef SECHW_DEF_H
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#define SECHW_DEF_H
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#include <mach/csp/mm_io.h>
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/* Bit mask for various secure device */
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#define secHw_BLK_MASK_CHIP_CONTROL 0x00000001
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#define secHw_BLK_MASK_KEY_SCAN 0x00000002
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#define secHw_BLK_MASK_TOUCH_SCREEN 0x00000004
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#define secHw_BLK_MASK_UART0 0x00000008
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#define secHw_BLK_MASK_UART1 0x00000010
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#define secHw_BLK_MASK_WATCHDOG 0x00000020
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#define secHw_BLK_MASK_SPUM 0x00000040
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#define secHw_BLK_MASK_DDR2 0x00000080
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#define secHw_BLK_MASK_EXT_MEM 0x00000100
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#define secHw_BLK_MASK_ESW 0x00000200
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#define secHw_BLK_MASK_SPU 0x00010000
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#define secHw_BLK_MASK_PKA 0x00020000
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#define secHw_BLK_MASK_RNG 0x00040000
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#define secHw_BLK_MASK_RTC 0x00080000
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#define secHw_BLK_MASK_OTP 0x00100000
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#define secHw_BLK_MASK_BOOT 0x00200000
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#define secHw_BLK_MASK_MPU 0x00400000
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#define secHw_BLK_MASK_TZCTRL 0x00800000
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#define secHw_BLK_MASK_INTR 0x01000000
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/* Trustzone register set */
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typedef struct {
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volatile uint32_t status; /* read only - reflects status of writes of 2 write registers */
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volatile uint32_t setUnsecure; /* write only. reads back as 0 */
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volatile uint32_t setSecure; /* write only. reads back as 0 */
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} secHw_TZREG_t;
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/* There are 2 register sets. The first is for the lower 16 bits, the 2nd */
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/* is for the higher 16 bits. */
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typedef enum {
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secHw_IDX_LS = 0,
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secHw_IDX_MS = 1,
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secHw_IDX_NUM
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} secHw_IDX_e;
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typedef struct {
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volatile secHw_TZREG_t reg[secHw_IDX_NUM];
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} secHw_REGS_t;
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/****************************************************************************/
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/**
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* @brief Configures a device as a secure device
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*
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*/
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/****************************************************************************/
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static inline void secHw_setSecure(uint32_t mask /* mask of type secHw_BLK_MASK_XXXXXX */
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);
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/****************************************************************************/
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/**
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* @brief Configures a device as a non-secure device
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*
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*/
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/****************************************************************************/
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static inline void secHw_setUnsecure(uint32_t mask /* mask of type secHw_BLK_MASK_XXXXXX */
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);
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/****************************************************************************/
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/**
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* @brief Get the trustzone status for all components. 1 = non-secure, 0 = secure
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*
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*/
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/****************************************************************************/
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static inline uint32_t secHw_getStatus(void);
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#include <mach/csp/secHw_inline.h>
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#endif /* SECHW_DEF_H */
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