Ben Skeggs f9400afb1e drm/nouveau/mmu/gp100,gp10b: implement new vmm backend ... Adds support for: - 64KiB/2MiB big page sizes (128KiB not supported by HW with new PT layout). - System-memory PTs. - LPTE "invalid" state. - (Tegra) Use of video memory aperture. - Sparse PDEs/PTEs. - Additional blocklinear kinds. - 49-bit address-space. GP100 supports an entirely new 5-level page table layout that provides an expanded 49-bit address-space. It also supports the layout present on previous generations, which we've been making do with until now. This commit implements support for the new layout, and enables it by default. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>		2017-11-02 13:32:30 +10:00
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drm	drm/nouveau/mmu/gp100,gp10b: implement new vmm backend	2017-11-02 13:32:30 +10:00
host1x	gpu: host1x: Fix incorrect comment for channel_request	2017-10-20 14:19:52 +02:00
ipu-v3	gpu: ipu-v3: pre: implement workaround for ERR009624	2017-10-11 12:04:24 +02:00
vga	vgaarb: Factor out EFI and fallback default device selection	2017-10-18 10:04:56 +02:00
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