linux/arch/mips/include
James Hogan f913e9ea39 MIPS: Add register definitions for VZ ASE registers
Add various register definitions to <asm/mipsregs.h> for the coprocessor
zero registers in the VZ ASE, namely CP0_GuestCtl0, CP0_GuestCtl0Ext,
CP0_GuestCtl1, CP0_GuestCtl2, CP0_GuestCtl3, and CP0_GTOffset.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13228/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13 15:30:25 +02:00
..
asm MIPS: Add register definitions for VZ ASE registers 2016-05-13 15:30:25 +02:00
uapi/asm MIPS: inst: Declare fsel_op for sel.fmt instruction 2016-05-13 14:02:21 +02:00