forked from Minki/linux
f39d7d78b7
Pull x86 fixes from Thomas Gleixner:
"A couple of fixlets for x86:
- Fix the ESPFIX double fault handling for 5-level pagetables
- Fix the commandline parsing for 'apic=' on 32bit systems and update
documentation
- Make zombie stack traces reliable
- Fix kexec with stack canary
- Fix the delivery mode for APICs which was missed when the x86
vector management was converted to single target delivery. Caused a
regression due to the broken hardware which ignores affinity
settings in lowest prio delivery mode.
- Unbreak modules when AMD memory encryption is enabled
- Remove an unused parameter of prepare_switch_to"
* 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/apic: Switch all APICs to Fixed delivery mode
x86/apic: Update the 'apic=' description of setting APIC driver
x86/apic: Avoid wrong warning when parsing 'apic=' in X86-32 case
x86-32: Fix kexec with stack canary (CONFIG_CC_STACKPROTECTOR)
x86: Remove unused parameter of prepare_switch_to
x86/stacktrace: Make zombie stack traces reliable
x86/mm: Unbreak modules that use the DMA API
x86/build: Make isoimage work on Debian
x86/espfix/64: Fix espfix double-fault handling on 5-level systems
102 lines
2.8 KiB
C
102 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_SWITCH_TO_H
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#define _ASM_X86_SWITCH_TO_H
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#include <linux/sched/task_stack.h>
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struct task_struct; /* one of the stranger aspects of C forward declarations */
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struct task_struct *__switch_to_asm(struct task_struct *prev,
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struct task_struct *next);
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__visible struct task_struct *__switch_to(struct task_struct *prev,
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struct task_struct *next);
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struct tss_struct;
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void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
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struct tss_struct *tss);
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/* This runs runs on the previous thread's stack. */
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static inline void prepare_switch_to(struct task_struct *next)
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{
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#ifdef CONFIG_VMAP_STACK
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/*
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* If we switch to a stack that has a top-level paging entry
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* that is not present in the current mm, the resulting #PF will
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* will be promoted to a double-fault and we'll panic. Probe
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* the new stack now so that vmalloc_fault can fix up the page
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* tables if needed. This can only happen if we use a stack
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* in vmap space.
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*
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* We assume that the stack is aligned so that it never spans
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* more than one top-level paging entry.
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*
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* To minimize cache pollution, just follow the stack pointer.
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*/
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READ_ONCE(*(unsigned char *)next->thread.sp);
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#endif
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}
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asmlinkage void ret_from_fork(void);
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/*
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* This is the structure pointed to by thread.sp for an inactive task. The
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* order of the fields must match the code in __switch_to_asm().
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*/
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struct inactive_task_frame {
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#ifdef CONFIG_X86_64
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unsigned long r15;
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unsigned long r14;
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unsigned long r13;
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unsigned long r12;
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#else
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unsigned long si;
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unsigned long di;
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#endif
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unsigned long bx;
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/*
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* These two fields must be together. They form a stack frame header,
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* needed by get_frame_pointer().
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*/
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unsigned long bp;
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unsigned long ret_addr;
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};
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struct fork_frame {
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struct inactive_task_frame frame;
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struct pt_regs regs;
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};
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#define switch_to(prev, next, last) \
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do { \
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prepare_switch_to(next); \
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\
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((last) = __switch_to_asm((prev), (next))); \
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} while (0)
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#ifdef CONFIG_X86_32
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static inline void refresh_sysenter_cs(struct thread_struct *thread)
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{
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/* Only happens when SEP is enabled, no need to test "SEP"arately: */
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if (unlikely(this_cpu_read(cpu_tss_rw.x86_tss.ss1) == thread->sysenter_cs))
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return;
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this_cpu_write(cpu_tss_rw.x86_tss.ss1, thread->sysenter_cs);
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wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
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}
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#endif
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/* This is used when switching tasks or entering/exiting vm86 mode. */
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static inline void update_sp0(struct task_struct *task)
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{
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/* On x86_64, sp0 always points to the entry trampoline stack, which is constant: */
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#ifdef CONFIG_X86_32
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load_sp0(task->thread.sp0);
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#else
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if (static_cpu_has(X86_FEATURE_XENPV))
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load_sp0(task_top_of_stack(task));
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#endif
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}
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#endif /* _ASM_X86_SWITCH_TO_H */
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