forked from Minki/linux
519f64bf15
because of summer time holidays/vacations. The biggest change in the diffstat is in the Qualcomm clk driver, where they got support for CPUs and handful of SoCs. After that, the at91 driver got a major rewrite for newer DT bindings that should make things easier going forward and the TI code moved to a clockdomain based design. The long tail is mostly small driver updates for newer clks and some simpler SoC clock drivers such as the Hisilicon and imx support. In the core framework, we only have two small changes this time. One is a new clk API to get all clks for a device with the bulk clk APIs. This allows drivers that don't care about doing anything besides turning on all the clks to just clk_get() them all and turn them on. The other change is the beginning of a way to support save and restore of clk settings in the clk framework. TI is the only user right now, but we will want to expand upon this design in the future to support more save and restore of clk registers. At least this gets us started and works well enough for one SoC, but there's more work in the future. Core: - clk_bulk_get_all() API and friends to get all the clks for a device - Basic clk state save/restore hooks New Drivers: - Renesas RZ/A2 (R7S9210) SoC, including early clocks - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs - Rensas RZ/G2M (r8a774a1) SoC - Qualcomm Krait CPU clk support - Qualcomm QCS404 GCC support - Qualcomm SDM660 GCC support - Qualcomm SDM845 camera clock controller - Ingenic jz4725b CGU - Hisilicon 3670 SoC support - TI SCI clks on K3 SoCs - iMX6 MMDC clks - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs Updates: - Rework at91 PMC clock driver for new DT bindings - Nvidia Tegra clk driver MBIST workaround fix - S2RAM support for Marvell mvebu periph clks - Use updated printk format for OF node names - Fix TI code to only search DT subnodes - Various static analysis finds - Tag various drivers with SPDX license tags - Support dynamic frequency switching (DFS) on qcom SDM845 GCC - Only use s2mps11 dt-binding defines instead of redefining them in the driver - Add some more missing clks to qcom MSM8996 GCC - Quad SPI clks on qcom SDM845 - Add support for CMT timer clocks on R-Car V3H - Add support for SHDI and various timer clocks on R-Car V3M - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs - Amlogic clk-pll driver improvements and updates - Amlogic axg audio controller system clocks - Register Amlogic meson8b clock controller early - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC - Remove obsoleted Exynos4212 ISP clock definitions - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design - TI RTC+DDR sleep mode support for clock save/restore - Allwinner A64 display engine support and fixes - Allwinner A83t display engine support and fixes -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlvY4ysRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSVaDBAA3Wv/rsCn4FJ2ZgIWYWQqr69lAWDcBVVe 4nNbFqzEmRoml8e+XOfVFwnbsai4B5ALVxyMnRlkDyxQ5TFQtF957U12Pf8upPa5 R447YBt4tw40NCj8u5KNAaBmYYHdmXXDvsBPXyQn+1iy/9R8Is8AcDmv+D2ucuJF PPBXOwb+2CstUQhuwlXyvsAw/tqq/rJDVyAZVJUoqXJwlNMjr76V0m0ZXHN6NcyC F2SfnzIO4srRteTeKXVFcMU/3uHC3zofEfammSJjGZkk4WHULuPpkD17RMEyBul1 Ju1S1nzGiKvYME/mmbIcRPNcpry65EVo/wn6IjAcG2m4GaWSq3F6qIttnoc6dnra R2VylIEy7HnNcAf8fkQdkd/l+h/TDp3iVrXg0p/rRxRk4Jlc86n2PWO6jtsZv4S+ NySeRhTb51KrTl72J76LP+dfDWdbeZfkAqr0Qx6QM04OznVYSTHlnQaeM1Nx2SZR 5+k126NdxDp7xgoJNfq18wzufrlefjuRTg2Kck1YuFuhV4Fjmq7ZC81bSSaakYPh /t073TcSZ+VfEYP5hVsl/pjMdFzHcj8pbavhs0UNIYLQNXe494Bm9PyYJOzQKnwz Zpbf7V6eplh8J1I03VI8RHviNp340iv2hhz9vp4mNP1vIhgdNiz7R2gn5sLSoFt+ vei0J0vEzCA= =V5aK -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This time it looks like a quieter release cycle in the clk tree. I guess that's because of summer time holidays/vacations. The biggest change in the diffstat is in the Qualcomm clk driver, where they got support for CPUs and handful of SoCs. After that, the at91 driver got a major rewrite for newer DT bindings that should make things easier going forward and the TI code moved to a clockdomain based design. The long tail is mostly small driver updates for newer clks and some simpler SoC clock drivers such as the Hisilicon and imx support. In the core framework, we only have two small changes this time. One is a new clk API to get all clks for a device with the bulk clk APIs. This allows drivers that don't care about doing anything besides turning on all the clks to just clk_get() them all and turn them on. The other change is the beginning of a way to support save and restore of clk settings in the clk framework. TI is the only user right now, but we will want to expand upon this design in the future to support more save and restore of clk registers. At least this gets us started and works well enough for one SoC, but there's more work in the future. Core: - clk_bulk_get_all() API and friends to get all the clks for a device - Basic clk state save/restore hooks New Drivers: - Renesas RZ/A2 (R7S9210) SoC, including early clocks - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs - Rensas RZ/G2M (r8a774a1) SoC - Qualcomm Krait CPU clk support - Qualcomm QCS404 GCC support - Qualcomm SDM660 GCC support - Qualcomm SDM845 camera clock controller - Ingenic jz4725b CGU - Hisilicon 3670 SoC support - TI SCI clks on K3 SoCs - iMX6 MMDC clks - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs Updates: - Rework at91 PMC clock driver for new DT bindings - Nvidia Tegra clk driver MBIST workaround fix - S2RAM support for Marvell mvebu periph clks - Use updated printk format for OF node names - Fix TI code to only search DT subnodes - Various static analysis finds - Tag various drivers with SPDX license tags - Support dynamic frequency switching (DFS) on qcom SDM845 GCC - Only use s2mps11 dt-binding defines instead of redefining them in the driver - Add some more missing clks to qcom MSM8996 GCC - Quad SPI clks on qcom SDM845 - Add support for CMT timer clocks on R-Car V3H - Add support for SHDI and various timer clocks on R-Car V3M - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs - Amlogic clk-pll driver improvements and updates - Amlogic axg audio controller system clocks - Register Amlogic meson8b clock controller early - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC - Remove obsoleted Exynos4212 ISP clock definitions - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design - TI RTC+DDR sleep mode support for clock save/restore - Allwinner A64 display engine support and fixes - Allwinner A83t display engine support and fixes" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (186 commits) clk: qcom: Remove unused arrays in SDM845 GCC clk: fixed-rate: fix of_node_get-put imbalance clk: s2mps11: Add used attribute to s2mps11_dt_match clk: qcom: gcc-sdm660: Add MODULE_LICENSE clk: qcom: Add safe switch hook for krait mux clocks dt-bindings: clock: Document qcom,krait-cc clk: qcom: Add Krait clock controller driver dt-bindings: arm: Document qcom,kpss-gcc clk: qcom: Add KPSS ACC/GCC driver clk: qcom: Add support for Krait clocks clk: qcom: Add IPQ806X's HFPLLs clk: qcom: Add MSM8960/APQ8064's HFPLLs dt-bindings: clock: Document qcom,hfpll clk: qcom: Add HFPLL driver clk: qcom: Add support for High-Frequency PLLs (HFPLLs) ARM: Add Krait L2 register accessor functions clk: imx6q: add mmdc0 ipg clock clk: imx6sl: add mmdc ipg clocks clk: imx6sll: add mmdc1 ipg clock clk: imx6sx: add mmdc1 ipg clock ...
306 lines
8.8 KiB
Plaintext
306 lines
8.8 KiB
Plaintext
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config CLKDEV_LOOKUP
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bool
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select HAVE_CLK
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config HAVE_CLK_PREPARE
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bool
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config COMMON_CLK
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bool
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select HAVE_CLK_PREPARE
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select CLKDEV_LOOKUP
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select SRCU
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select RATIONAL
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---help---
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The common clock framework is a single definition of struct
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clk, useful across many platforms, as well as an
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implementation of the clock API in include/linux/clk.h.
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Architectures utilizing the common struct clk should select
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this option.
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menu "Common Clock Framework"
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depends on COMMON_CLK
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config COMMON_CLK_WM831X
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tristate "Clock driver for WM831x/2x PMICs"
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depends on MFD_WM831X
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---help---
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Supports the clocking subsystem of the WM831x/2x series of
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PMICs from Wolfson Microelectronics.
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source "drivers/clk/versatile/Kconfig"
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config CLK_HSDK
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bool "PLL Driver for HSDK platform"
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depends on OF || COMPILE_TEST
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---help---
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This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
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control.
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config COMMON_CLK_MAX77686
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tristate "Clock driver for Maxim 77620/77686/77802 MFD"
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depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
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---help---
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This driver supports Maxim 77620/77686/77802 crystal oscillator
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clock.
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config COMMON_CLK_MAX9485
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tristate "Maxim 9485 Programmable Clock Generator"
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depends on I2C
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help
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This driver supports Maxim 9485 Programmable Audio Clock Generator
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config COMMON_CLK_RK808
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tristate "Clock driver for RK805/RK808/RK818"
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depends on MFD_RK808
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---help---
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This driver supports RK805, RK808 and RK818 crystal oscillator clock. These
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multi-function devices have two fixed-rate oscillators,
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clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
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by control register.
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config COMMON_CLK_HI655X
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tristate "Clock driver for Hi655x" if EXPERT
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depends on (MFD_HI655X_PMIC || COMPILE_TEST)
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depends on REGMAP
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default MFD_HI655X_PMIC
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---help---
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This driver supports the hi655x PMIC clock. This
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multi-function device has one fixed-rate oscillator, clocked
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at 32KHz.
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config COMMON_CLK_SCMI
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tristate "Clock driver controlled via SCMI interface"
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depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
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---help---
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This driver provides support for clocks that are controlled
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by firmware that implements the SCMI interface.
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This driver uses SCMI Message Protocol to interact with the
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firmware providing all the clock controls.
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config COMMON_CLK_SCPI
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tristate "Clock driver controlled via SCPI interface"
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depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
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---help---
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This driver provides support for clocks that are controlled
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by firmware that implements the SCPI interface.
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This driver uses SCPI Message Protocol to interact with the
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firmware providing all the clock controls.
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config COMMON_CLK_SI5351
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tristate "Clock driver for SiLabs 5351A/B/C"
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depends on I2C
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select REGMAP_I2C
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select RATIONAL
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---help---
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This driver supports Silicon Labs 5351A/B/C programmable clock
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generators.
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config COMMON_CLK_SI514
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tristate "Clock driver for SiLabs 514 devices"
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depends on I2C
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depends on OF
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select REGMAP_I2C
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help
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---help---
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This driver supports the Silicon Labs 514 programmable clock
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generator.
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config COMMON_CLK_SI544
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tristate "Clock driver for SiLabs 544 devices"
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depends on I2C
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select REGMAP_I2C
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help
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---help---
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This driver supports the Silicon Labs 544 programmable clock
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generator.
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config COMMON_CLK_SI570
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tristate "Clock driver for SiLabs 570 and compatible devices"
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depends on I2C
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depends on OF
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select REGMAP_I2C
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help
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---help---
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This driver supports Silicon Labs 570/571/598/599 programmable
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clock generators.
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config COMMON_CLK_CDCE706
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tristate "Clock driver for TI CDCE706 clock synthesizer"
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depends on I2C
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select REGMAP_I2C
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select RATIONAL
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---help---
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This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
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config COMMON_CLK_CDCE925
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tristate "Clock driver for TI CDCE913/925/937/949 devices"
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depends on I2C
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depends on OF
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select REGMAP_I2C
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help
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---help---
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This driver supports the TI CDCE913/925/937/949 programmable clock
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synthesizer. Each chip has different number of PLLs and outputs.
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For example, the CDCE925 contains two PLLs with spread-spectrum
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clocking support and five output dividers. The driver only supports
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the following setup, and uses a fixed setting for the output muxes.
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Y1 is derived from the input clock
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Y2 and Y3 derive from PLL1
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Y4 and Y5 derive from PLL2
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Given a target output frequency, the driver will set the PLL and
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divider to best approximate the desired output.
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config COMMON_CLK_CS2000_CP
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tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
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depends on I2C
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help
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If you say yes here you get support for the CS2000 clock multiplier.
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config COMMON_CLK_GEMINI
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bool "Clock driver for Cortina Systems Gemini SoC"
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depends on ARCH_GEMINI || COMPILE_TEST
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select MFD_SYSCON
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select RESET_CONTROLLER
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---help---
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This driver supports the SoC clocks on the Cortina Systems Gemini
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platform, also known as SL3516 or CS3516.
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config COMMON_CLK_ASPEED
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bool "Clock driver for Aspeed BMC SoCs"
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depends on ARCH_ASPEED || COMPILE_TEST
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default ARCH_ASPEED
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select MFD_SYSCON
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select RESET_CONTROLLER
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---help---
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This driver supports the SoC clocks on the Aspeed BMC platforms.
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The G4 and G5 series, including the ast2400 and ast2500, are supported
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by this driver.
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config COMMON_CLK_S2MPS11
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tristate "Clock driver for S2MPS1X/S5M8767 MFD"
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depends on MFD_SEC_CORE || COMPILE_TEST
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---help---
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This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
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clock. These multi-function devices have two (S2MPS14) or three
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(S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
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config CLK_TWL6040
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tristate "External McPDM functional clock from twl6040"
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depends on TWL6040_CORE
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---help---
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Enable the external functional clock support on OMAP4+ platforms for
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McPDM. McPDM module is using the external bit clock on the McPDM bus
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as functional clock.
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config COMMON_CLK_AXI_CLKGEN
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tristate "AXI clkgen driver"
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depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
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help
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---help---
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Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
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FPGAs. It is commonly used in Analog Devices' reference designs.
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config CLK_QORIQ
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bool "Clock driver for Freescale QorIQ platforms"
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depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
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---help---
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This adds the clock driver support for Freescale QorIQ platforms
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using common clock framework.
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config COMMON_CLK_XGENE
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bool "Clock driver for APM XGene SoC"
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default y
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depends on ARM64 || COMPILE_TEST
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---help---
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Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
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config COMMON_CLK_NXP
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def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
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select REGMAP_MMIO if ARCH_LPC32XX
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select MFD_SYSCON if ARCH_LPC18XX
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---help---
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Support for clock providers on NXP platforms.
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config COMMON_CLK_PALMAS
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tristate "Clock driver for TI Palmas devices"
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depends on MFD_PALMAS
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---help---
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This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
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using common clock framework.
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config COMMON_CLK_PWM
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tristate "Clock driver for PWMs used as clock outputs"
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depends on PWM
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---help---
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Adapter driver so that any PWM output can be (mis)used as clock signal
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at 50% duty cycle.
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config COMMON_CLK_PXA
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def_bool COMMON_CLK && ARCH_PXA
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---help---
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Support for the Marvell PXA SoC.
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config COMMON_CLK_PIC32
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def_bool COMMON_CLK && MACH_PIC32
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config COMMON_CLK_OXNAS
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bool "Clock driver for the OXNAS SoC Family"
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depends on ARCH_OXNAS || COMPILE_TEST
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select MFD_SYSCON
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---help---
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Support for the OXNAS SoC Family clocks.
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config COMMON_CLK_VC5
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tristate "Clock driver for IDT VersaClock 5,6 devices"
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depends on I2C
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depends on OF
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select REGMAP_I2C
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help
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---help---
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This driver supports the IDT VersaClock 5 and VersaClock 6
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programmable clock generators.
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config COMMON_CLK_STM32MP157
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def_bool COMMON_CLK && MACH_STM32MP157
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help
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---help---
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Support for stm32mp157 SoC family clocks
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config COMMON_CLK_STM32F
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def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
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help
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---help---
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Support for stm32f4 and stm32f7 SoC families clocks
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config COMMON_CLK_STM32H7
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def_bool COMMON_CLK && MACH_STM32H743
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help
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---help---
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Support for stm32h7 SoC family clocks
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source "drivers/clk/actions/Kconfig"
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source "drivers/clk/bcm/Kconfig"
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source "drivers/clk/hisilicon/Kconfig"
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source "drivers/clk/imgtec/Kconfig"
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source "drivers/clk/ingenic/Kconfig"
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source "drivers/clk/keystone/Kconfig"
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source "drivers/clk/mediatek/Kconfig"
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source "drivers/clk/meson/Kconfig"
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source "drivers/clk/mvebu/Kconfig"
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source "drivers/clk/qcom/Kconfig"
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source "drivers/clk/renesas/Kconfig"
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source "drivers/clk/samsung/Kconfig"
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source "drivers/clk/sprd/Kconfig"
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source "drivers/clk/sunxi-ng/Kconfig"
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source "drivers/clk/tegra/Kconfig"
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source "drivers/clk/ti/Kconfig"
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source "drivers/clk/uniphier/Kconfig"
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source "drivers/clk/zynqmp/Kconfig"
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endmenu
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