493a358e0a
This patch cleans up solution engine 7722 specific interrupt code. The main purpose is to replace the mux function with use of set_irq_chained_handler() and replace hard coded register poking code with set_irq_type(). The board specific interrupts are also moved to start from SE7722_FPGA_IRQ_BASE. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
147 lines
3.5 KiB
C
147 lines
3.5 KiB
C
/*
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* linux/arch/sh/boards/se/7722/setup.c
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*
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* Copyright (C) 2007 Nobuhiro Iwamatsu
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*
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* Hitachi UL SolutionEngine 7722 Support.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pata_platform.h>
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#include <asm/machvec.h>
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#include <asm/se7722.h>
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#include <asm/io.h>
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/* Heartbeat */
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static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
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static struct resource heartbeat_resources[] = {
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[0] = {
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.start = PA_LED,
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.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device heartbeat_device = {
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.name = "heartbeat",
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.id = -1,
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.dev = {
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.platform_data = heartbeat_bit_pos,
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},
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.num_resources = ARRAY_SIZE(heartbeat_resources),
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.resource = heartbeat_resources,
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};
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/* SMC91x */
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static struct resource smc91x_eth_resources[] = {
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[0] = {
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.name = "smc91x-regs" ,
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.start = PA_LAN + 0x300,
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.end = PA_LAN + 0x300 + 0x10 ,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = SMC_IRQ,
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.end = SMC_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device smc91x_eth_device = {
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.name = "smc91x",
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.id = 0,
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.dev = {
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.dma_mask = NULL, /* don't use dma */
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(smc91x_eth_resources),
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.resource = smc91x_eth_resources,
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};
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static struct resource cf_ide_resources[] = {
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[0] = {
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.start = PA_MRSHPC_IO + 0x1f0,
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.end = PA_MRSHPC_IO + 0x1f0 + 8 ,
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.flags = IORESOURCE_IO,
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},
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[1] = {
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.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
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.end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
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.flags = IORESOURCE_IO,
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},
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[2] = {
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.start = MRSHPC_IRQ0,
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.end = MRSHPC_IRQ0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device cf_ide_device = {
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.name = "pata_platform",
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.id = -1,
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.num_resources = ARRAY_SIZE(cf_ide_resources),
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.resource = cf_ide_resources,
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};
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static struct platform_device *se7722_devices[] __initdata = {
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&heartbeat_device,
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&smc91x_eth_device,
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&cf_ide_device,
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};
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static int __init se7722_devices_setup(void)
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{
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return platform_add_devices(se7722_devices,
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ARRAY_SIZE(se7722_devices));
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}
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device_initcall(se7722_devices_setup);
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static void __init se7722_setup(char **cmdline_p)
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{
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ctrl_outw(0x010D, FPGA_OUT); /* FPGA */
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ctrl_outl(0x00051001, MSTPCR0);
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ctrl_outl(0x00000000, MSTPCR1);
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/* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC */
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ctrl_outl(0xffffbfC0, MSTPCR2);
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ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
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ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
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/* LCDC I/O */
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ctrl_outw(0x0020, PORT_PSELD);
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/* SIOF1*/
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ctrl_outw(0x0003, PORT_PSELB);
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ctrl_outw(0xe000, PORT_PSELC);
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ctrl_outw(0x0000, PORT_PKCR);
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/* LCDC */
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ctrl_outw(0x4020, PORT_PHCR);
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ctrl_outw(0x0000, PORT_PLCR);
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ctrl_outw(0x0000, PORT_PMCR);
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ctrl_outw(0x0002, PORT_PRCR);
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ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */
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/* KEYSC */
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ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */
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ctrl_outw(0x0000, PORT_PYCR);
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ctrl_outw(0x0000, PORT_PZCR);
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}
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_se7722 __initmv = {
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.mv_name = "Solution Engine 7722" ,
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.mv_setup = se7722_setup ,
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.mv_nr_irqs = SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_NR,
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.mv_init_irq = init_se7722_IRQ,
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};
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