Dmitry Osipenko f68ba6912b drm/tegra: dc: Link DC1 to DC0 on Tegra20 ... Hardware reset isn't actually broken on Tegra20, but there is a dependency on the first display controller to be taken out of reset for the second to be enabled successfully. Model this dependency using a PM device link. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: minor cleanups, extend commit message] Signed-off-by: Thierry Reding <treding@nvidia.com>		2017-12-21 14:52:38 +01:00
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drm	drm/tegra: dc: Link DC1 to DC0 on Tegra20	2017-12-21 14:52:38 +01:00
host1x	gpu: host1x: Use IOMMU groups	2017-12-21 14:52:36 +01:00
ipu-v3	fixes/cleanups for rc1, non-desktop flags for VR	2017-11-23 21:04:56 -10:00
vga	vgaarb: Factor out EFI and fallback default device selection	2017-10-18 10:04:56 +02:00
Makefile