Heiko Stuebner f5f7004fde clk: rockchip: reparent aclk_cpu_pre to the gpll ... aclk_cpu_pre on the rk3188 can either be sourced from the armclk or the gpll. To reduce complexity on apll changes caused by cpufreq, reparent it always to the gpll source. If really necessary it could be reparented back on a per board level using the assigned-clocks mechanism. Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2014-09-27 17:57:14 +02:00
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clk-pll.c	clk: rockchip: change pll rate without a clk-notifier	2014-09-27 17:57:04 +02:00
clk-rk3188.c	clk: rockchip: reparent aclk_cpu_pre to the gpll	2014-09-27 17:57:14 +02:00
clk-rk3288.c	clk: rockchip: fix rk3288 pll status register location	2014-09-27 17:57:10 +02:00
clk-rockchip.c	clk: rockchip: fix function type for CLK_OF_DECLARE	2014-05-20 14:25:22 -05:00
clk.c	clk: rockchip: protect critical clocks from getting disabled	2014-09-02 15:03:18 -07:00
clk.h	clk: rockchip: protect critical clocks from getting disabled	2014-09-02 15:03:18 -07:00
Makefile	clk: rockchip: add clock controller for rk3288	2014-07-13 12:17:10 -07:00
softrst.c	clk: rockchip: add reset controller	2014-07-13 12:17:07 -07:00