f4c88991f5
Use a queue to handle WMI events and schedule a tasklet to process the events. This fixes the race between the WMI event ISR and the SWBA tasklet when the arrival of WMI events in quick succession could overwrite the SWBA data before the tasklet from a previous iteration could have been scheduled. Also, drain the WMI queue properly. Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
151 lines
3.6 KiB
C
151 lines
3.6 KiB
C
/*
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* Copyright (c) 2010 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef WMI_H
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#define WMI_H
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struct wmi_event_txrate {
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__be32 txrate;
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struct {
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u8 rssi_thresh;
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u8 per;
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} rc_stats;
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} __packed;
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struct wmi_cmd_hdr {
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__be16 command_id;
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__be16 seq_no;
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} __packed;
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struct wmi_fw_version {
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__be16 major;
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__be16 minor;
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} __packed;
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struct wmi_event_swba {
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__be64 tsf;
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u8 beacon_pending;
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};
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enum wmi_cmd_id {
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WMI_ECHO_CMDID = 0x0001,
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WMI_ACCESS_MEMORY_CMDID,
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/* Commands to Target */
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WMI_GET_FW_VERSION,
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WMI_DISABLE_INTR_CMDID,
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WMI_ENABLE_INTR_CMDID,
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WMI_RX_LINK_CMDID,
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WMI_ATH_INIT_CMDID,
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WMI_ABORT_TXQ_CMDID,
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WMI_STOP_TX_DMA_CMDID,
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WMI_STOP_DMA_RECV_CMDID,
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WMI_ABORT_TX_DMA_CMDID,
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WMI_DRAIN_TXQ_CMDID,
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WMI_DRAIN_TXQ_ALL_CMDID,
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WMI_START_RECV_CMDID,
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WMI_STOP_RECV_CMDID,
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WMI_FLUSH_RECV_CMDID,
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WMI_SET_MODE_CMDID,
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WMI_RESET_CMDID,
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WMI_NODE_CREATE_CMDID,
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WMI_NODE_REMOVE_CMDID,
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WMI_VAP_REMOVE_CMDID,
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WMI_VAP_CREATE_CMDID,
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WMI_BEACON_UPDATE_CMDID,
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WMI_REG_READ_CMDID,
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WMI_REG_WRITE_CMDID,
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WMI_RC_STATE_CHANGE_CMDID,
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WMI_RC_RATE_UPDATE_CMDID,
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WMI_DEBUG_INFO_CMDID,
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WMI_HOST_ATTACH,
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WMI_TARGET_IC_UPDATE_CMDID,
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WMI_TGT_STATS_CMDID,
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WMI_TX_AGGR_ENABLE_CMDID,
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WMI_TGT_DETACH_CMDID,
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WMI_TGT_TXQ_ENABLE_CMDID,
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WMI_AGGR_LIMIT_CMD = 0x0026,
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};
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enum wmi_event_id {
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WMI_TGT_RDY_EVENTID = 0x1001,
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WMI_SWBA_EVENTID,
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WMI_FATAL_EVENTID,
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WMI_TXTO_EVENTID,
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WMI_BMISS_EVENTID,
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WMI_WLAN_TXCOMP_EVENTID,
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WMI_DELBA_EVENTID,
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WMI_TXRATE_EVENTID,
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};
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#define MAX_CMD_NUMBER 62
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struct register_write {
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__be32 reg;
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__be32 val;
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};
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struct wmi {
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struct ath9k_htc_priv *drv_priv;
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struct htc_target *htc;
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enum htc_endpoint_id ctrl_epid;
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struct mutex op_mutex;
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struct completion cmd_wait;
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enum wmi_cmd_id last_cmd_id;
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struct sk_buff_head wmi_event_queue;
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struct tasklet_struct wmi_event_tasklet;
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u16 tx_seq_id;
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u8 *cmd_rsp_buf;
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u32 cmd_rsp_len;
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bool stopped;
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spinlock_t wmi_lock;
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atomic_t mwrite_cnt;
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struct register_write multi_write[MAX_CMD_NUMBER];
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u32 multi_write_idx;
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struct mutex multi_write_mutex;
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};
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struct wmi *ath9k_init_wmi(struct ath9k_htc_priv *priv);
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void ath9k_deinit_wmi(struct ath9k_htc_priv *priv);
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int ath9k_wmi_connect(struct htc_target *htc, struct wmi *wmi,
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enum htc_endpoint_id *wmi_ctrl_epid);
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int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id,
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u8 *cmd_buf, u32 cmd_len,
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u8 *rsp_buf, u32 rsp_len,
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u32 timeout);
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void ath9k_wmi_event_tasklet(unsigned long data);
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void ath9k_fatal_work(struct work_struct *work);
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void ath9k_wmi_event_drain(struct ath9k_htc_priv *priv);
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#define WMI_CMD(_wmi_cmd) \
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do { \
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ret = ath9k_wmi_cmd(priv->wmi, _wmi_cmd, NULL, 0, \
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(u8 *) &cmd_rsp, \
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sizeof(cmd_rsp), HZ*2); \
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} while (0)
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#define WMI_CMD_BUF(_wmi_cmd, _buf) \
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do { \
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ret = ath9k_wmi_cmd(priv->wmi, _wmi_cmd, \
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(u8 *) _buf, sizeof(*_buf), \
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&cmd_rsp, sizeof(cmd_rsp), HZ*2); \
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} while (0)
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#endif /* WMI_H */
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