linux/arch/x86/kvm
Kai Huang f3ecb59dd4 kvm: x86: Fix reserved bits related calculation errors caused by MKTME
Intel MKTME repurposes several high bits of physical address as 'keyID'
for memory encryption thus effectively reduces platform's maximum
physical address bits. Exactly how many bits are reduced is configured
by BIOS. To honor such HW behavior, the repurposed bits are reduced from
cpuinfo_x86->x86_phys_bits when MKTME is detected in CPU detection.
Similarly, AMD SME/SEV also reduces physical address bits for memory
encryption, and cpuinfo->x86_phys_bits is reduced too when SME/SEV is
detected, so for both MKTME and SME/SEV, boot_cpu_data.x86_phys_bits
doesn't hold physical address bits reported by CPUID anymore.

Currently KVM treats bits from boot_cpu_data.x86_phys_bits to 51 as
reserved bits, but it's not true anymore for MKTME, since MKTME treats
those reduced bits as 'keyID', but not reserved bits. Therefore
boot_cpu_data.x86_phys_bits cannot be used to calculate reserved bits
anymore, although we can still use it for AMD SME/SEV since SME/SEV
treats the reduced bits differently -- they are treated as reserved
bits, the same as other reserved bits in page table entity [1].

Fix by introducing a new 'shadow_phys_bits' variable in KVM x86 MMU code
to store the effective physical bits w/o reserved bits -- for MKTME,
it equals to physical address reported by CPUID, and for SME/SEV, it is
boot_cpu_data.x86_phys_bits.

Note that for the physical address bits reported to guest should remain
unchanged -- KVM should report physical address reported by CPUID to
guest, but not boot_cpu_data.x86_phys_bits. Because for Intel MKTME,
there's no harm if guest sets up 'keyID' bits in guest page table (since
MKTME only works at physical address level), and KVM doesn't even expose
MKTME to guest. Arguably, for AMD SME/SEV, guest is aware of SEV thus it
should adjust boot_cpu_data.x86_phys_bits when it detects SEV, therefore
KVM should still reports physcial address reported by CPUID to guest.

Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Kai Huang <kai.huang@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-06-04 19:27:26 +02:00
..
vmx KVM: x86/pmu: do not mask the value that is written to fixed PMUs 2019-05-24 21:27:14 +02:00
cpuid.c kvm: x86: Include CPUID leaf 0x8000001e in kvm's supported CPUID 2019-05-24 21:27:06 +02:00
cpuid.h KVM/x86: Update the reverse_cpuid list to include CPUID_7_EDX 2018-02-03 23:06:51 +01:00
debugfs.c KVM: LAPIC: Expose per-vCPU timer_advance_ns to userspace 2019-05-24 21:27:09 +02:00
emulate.c KVM: x86: Always use 32-bit SMRAM save state for 32-bit kernels 2019-04-16 15:37:38 +02:00
hyperv.c * ARM: support for SVE and Pointer Authentication in guests, PMU improvements 2019-05-17 10:33:30 -07:00
hyperv.h x86/kvm/hyper-v: Introduce KVM_GET_SUPPORTED_HV_CPUID 2018-12-14 17:59:54 +01:00
i8254.c kvm: x86: Add memcg accounting to KVM allocations 2019-02-20 22:48:30 +01:00
i8254.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
i8259.c kvm: x86: Add memcg accounting to KVM allocations 2019-02-20 22:48:30 +01:00
ioapic.c kvm: x86: Add memcg accounting to KVM allocations 2019-02-20 22:48:30 +01:00
ioapic.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
irq_comm.c KVM: x86: don't hold kvm->lock in KVM_SET_GSI_ROUTING 2017-05-02 14:45:45 +02:00
irq.c kvm: Check irqchip mode before assign irqfd 2019-05-24 21:27:12 +02:00
irq.h kvm: Check irqchip mode before assign irqfd 2019-05-24 21:27:12 +02:00
Kconfig Make anon_inodes unconditional 2019-04-19 14:03:11 +02:00
kvm_cache_regs.h KVM: x86: use direct accessors for RIP and RSP 2019-04-30 22:07:26 +02:00
lapic.c * ARM: support for SVE and Pointer Authentication in guests, PMU improvements 2019-05-17 10:33:30 -07:00
lapic.h KVM: lapic: Allow user to disable adaptive tuning of timer advancement 2019-04-18 18:56:15 +02:00
Makefile KVM: x86: fix TRACE_INCLUDE_PATH and remove -I. header search paths 2019-01-25 19:12:37 +01:00
mmu_audit.c x86/kvm/mmu: make vcpu->mmu a pointer to the current MMU 2018-10-17 00:30:02 +02:00
mmu.c kvm: x86: Fix reserved bits related calculation errors caused by MKTME 2019-06-04 19:27:26 +02:00
mmu.h kvm: mmu: Fix overflow on kvm mmu page limit calculation 2019-04-16 15:37:30 +02:00
mmutrace.h KVM: x86: fix handling of role.cr4_pae and rename it to 'gpte_size' 2019-03-28 17:27:03 +01:00
mtrr.c KVM: x86: optimize check for valid PAT value 2019-04-16 15:39:02 +02:00
page_track.c kvm: x86: Add memcg accounting to KVM allocations 2019-02-20 22:48:30 +01:00
paging_tmpl.h * ARM: support for SVE and Pointer Authentication in guests, PMU improvements 2019-05-17 10:33:30 -07:00
pmu_amd.c KVM: x86/pmu: mask the result of rdpmc according to the width of the counters 2019-05-24 21:27:13 +02:00
pmu.c KVM: x86/pmu: mask the result of rdpmc according to the width of the counters 2019-05-24 21:27:13 +02:00
pmu.h KVM: x86/pmu: mask the result of rdpmc according to the width of the counters 2019-05-24 21:27:13 +02:00
svm.c KVM: x86: do not spam dmesg with VMCS/VMCB dumps 2019-05-24 21:27:12 +02:00
trace.h KVM: x86: avoid misreporting level-triggered irqs as edge-triggered in tracing 2019-04-16 15:38:08 +02:00
tss.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
x86.c kvm: x86: Move kvm_set_mmio_spte_mask() from x86.c to mmu.c 2019-06-04 19:27:26 +02:00
x86.h * ARM: support for SVE and Pointer Authentication in guests, PMU improvements 2019-05-17 10:33:30 -07:00