forked from Minki/linux
f33a73586f
Add xo clock support required to boot up Qualcomm ADSP processor. The ADSP remoteproc driver keeps xo clock enabled until the driver receives "handover" irq, in order to allow ADSP processor to vote for xo clock with rpm. Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
428 lines
9.2 KiB
C
428 lines
9.2 KiB
C
/*
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* Qualcomm ADSP Peripheral Image Loader for MSM8974 and MSM8996
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*
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* Copyright (C) 2016 Linaro Ltd
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* Copyright (C) 2014 Sony Mobile Communications AB
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* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/firmware.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/qcom_scm.h>
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#include <linux/regulator/consumer.h>
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#include <linux/remoteproc.h>
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#include <linux/soc/qcom/smem.h>
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#include <linux/soc/qcom/smem_state.h>
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#include "qcom_mdt_loader.h"
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#include "remoteproc_internal.h"
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#define ADSP_CRASH_REASON_SMEM 423
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#define ADSP_FIRMWARE_NAME "adsp.mdt"
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#define ADSP_PAS_ID 1
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struct qcom_adsp {
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struct device *dev;
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struct rproc *rproc;
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int wdog_irq;
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int fatal_irq;
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int ready_irq;
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int handover_irq;
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int stop_ack_irq;
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struct qcom_smem_state *state;
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unsigned stop_bit;
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struct clk *xo;
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struct regulator *cx_supply;
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struct completion start_done;
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struct completion stop_done;
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phys_addr_t mem_phys;
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phys_addr_t mem_reloc;
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void *mem_region;
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size_t mem_size;
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};
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static int adsp_load(struct rproc *rproc, const struct firmware *fw)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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phys_addr_t fw_addr;
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size_t fw_size;
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bool relocate;
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int ret;
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ret = qcom_scm_pas_init_image(ADSP_PAS_ID, fw->data, fw->size);
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if (ret) {
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dev_err(&rproc->dev, "invalid firmware metadata\n");
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return ret;
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}
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ret = qcom_mdt_parse(fw, &fw_addr, &fw_size, &relocate);
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if (ret) {
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dev_err(&rproc->dev, "failed to parse mdt header\n");
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return ret;
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}
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if (relocate) {
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adsp->mem_reloc = fw_addr;
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ret = qcom_scm_pas_mem_setup(ADSP_PAS_ID, adsp->mem_phys, fw_size);
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if (ret) {
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dev_err(&rproc->dev, "unable to setup memory for image\n");
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return ret;
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}
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}
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return qcom_mdt_load(rproc, fw, rproc->firmware);
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}
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static const struct rproc_fw_ops adsp_fw_ops = {
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.find_rsc_table = qcom_mdt_find_rsc_table,
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.load = adsp_load,
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};
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static int adsp_start(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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int ret;
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ret = clk_prepare_enable(adsp->xo);
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if (ret)
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return ret;
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ret = regulator_enable(adsp->cx_supply);
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if (ret)
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goto disable_clocks;
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ret = qcom_scm_pas_auth_and_reset(ADSP_PAS_ID);
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if (ret) {
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dev_err(adsp->dev,
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"failed to authenticate image and release reset\n");
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goto disable_regulators;
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}
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ret = wait_for_completion_timeout(&adsp->start_done,
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msecs_to_jiffies(5000));
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if (!ret) {
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dev_err(adsp->dev, "start timed out\n");
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qcom_scm_pas_shutdown(ADSP_PAS_ID);
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ret = -ETIMEDOUT;
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goto disable_regulators;
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}
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ret = 0;
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disable_regulators:
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regulator_disable(adsp->cx_supply);
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disable_clocks:
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clk_disable_unprepare(adsp->xo);
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return ret;
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}
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static int adsp_stop(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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int ret;
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qcom_smem_state_update_bits(adsp->state,
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BIT(adsp->stop_bit),
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BIT(adsp->stop_bit));
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ret = wait_for_completion_timeout(&adsp->stop_done,
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msecs_to_jiffies(5000));
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if (ret == 0)
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dev_err(adsp->dev, "timed out on wait\n");
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qcom_smem_state_update_bits(adsp->state,
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BIT(adsp->stop_bit),
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0);
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ret = qcom_scm_pas_shutdown(ADSP_PAS_ID);
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if (ret)
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dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
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return ret;
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}
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static void *adsp_da_to_va(struct rproc *rproc, u64 da, int len)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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int offset;
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offset = da - adsp->mem_reloc;
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if (offset < 0 || offset + len > adsp->mem_size)
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return NULL;
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return adsp->mem_region + offset;
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}
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static const struct rproc_ops adsp_ops = {
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.start = adsp_start,
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.stop = adsp_stop,
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.da_to_va = adsp_da_to_va,
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};
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static irqreturn_t adsp_wdog_interrupt(int irq, void *dev)
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{
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struct qcom_adsp *adsp = dev;
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rproc_report_crash(adsp->rproc, RPROC_WATCHDOG);
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return IRQ_HANDLED;
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}
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static irqreturn_t adsp_fatal_interrupt(int irq, void *dev)
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{
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struct qcom_adsp *adsp = dev;
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size_t len;
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char *msg;
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msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, ADSP_CRASH_REASON_SMEM, &len);
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if (!IS_ERR(msg) && len > 0 && msg[0])
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dev_err(adsp->dev, "fatal error received: %s\n", msg);
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rproc_report_crash(adsp->rproc, RPROC_FATAL_ERROR);
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if (!IS_ERR(msg))
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msg[0] = '\0';
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return IRQ_HANDLED;
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}
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static irqreturn_t adsp_ready_interrupt(int irq, void *dev)
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{
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return IRQ_HANDLED;
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}
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static irqreturn_t adsp_handover_interrupt(int irq, void *dev)
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{
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struct qcom_adsp *adsp = dev;
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complete(&adsp->start_done);
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return IRQ_HANDLED;
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}
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static irqreturn_t adsp_stop_ack_interrupt(int irq, void *dev)
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{
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struct qcom_adsp *adsp = dev;
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complete(&adsp->stop_done);
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return IRQ_HANDLED;
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}
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static int adsp_init_clock(struct qcom_adsp *adsp)
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{
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int ret;
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adsp->xo = devm_clk_get(adsp->dev, "xo");
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if (IS_ERR(adsp->xo)) {
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ret = PTR_ERR(adsp->xo);
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if (ret != -EPROBE_DEFER)
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dev_err(adsp->dev, "failed to get xo clock");
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return ret;
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}
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return 0;
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}
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static int adsp_init_regulator(struct qcom_adsp *adsp)
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{
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adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
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if (IS_ERR(adsp->cx_supply))
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return PTR_ERR(adsp->cx_supply);
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regulator_set_load(adsp->cx_supply, 100000);
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return 0;
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}
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static int adsp_request_irq(struct qcom_adsp *adsp,
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struct platform_device *pdev,
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const char *name,
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irq_handler_t thread_fn)
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{
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int ret;
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ret = platform_get_irq_byname(pdev, name);
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if (ret < 0) {
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dev_err(&pdev->dev, "no %s IRQ defined\n", name);
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return ret;
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}
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ret = devm_request_threaded_irq(&pdev->dev, ret,
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NULL, thread_fn,
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IRQF_ONESHOT,
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"adsp", adsp);
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if (ret)
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dev_err(&pdev->dev, "request %s IRQ failed\n", name);
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return ret;
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}
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static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
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{
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struct device_node *node;
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struct resource r;
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int ret;
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node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
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if (!node) {
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dev_err(adsp->dev, "no memory-region specified\n");
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return -EINVAL;
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}
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ret = of_address_to_resource(node, 0, &r);
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if (ret)
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return ret;
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adsp->mem_phys = adsp->mem_reloc = r.start;
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adsp->mem_size = resource_size(&r);
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adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
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if (!adsp->mem_region) {
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dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
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&r.start, adsp->mem_size);
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return -EBUSY;
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}
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return 0;
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}
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static int adsp_probe(struct platform_device *pdev)
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{
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struct qcom_adsp *adsp;
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struct rproc *rproc;
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int ret;
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if (!qcom_scm_is_available())
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return -EPROBE_DEFER;
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if (!qcom_scm_pas_supported(ADSP_PAS_ID)) {
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dev_err(&pdev->dev, "PAS is not available for ADSP\n");
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return -ENXIO;
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}
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rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
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ADSP_FIRMWARE_NAME, sizeof(*adsp));
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if (!rproc) {
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dev_err(&pdev->dev, "unable to allocate remoteproc\n");
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return -ENOMEM;
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}
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rproc->fw_ops = &adsp_fw_ops;
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adsp = (struct qcom_adsp *)rproc->priv;
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adsp->dev = &pdev->dev;
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adsp->rproc = rproc;
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platform_set_drvdata(pdev, adsp);
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init_completion(&adsp->start_done);
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init_completion(&adsp->stop_done);
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ret = adsp_alloc_memory_region(adsp);
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if (ret)
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goto free_rproc;
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ret = adsp_init_clock(adsp);
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if (ret)
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goto free_rproc;
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ret = adsp_init_regulator(adsp);
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if (ret)
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goto free_rproc;
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ret = adsp_request_irq(adsp, pdev, "wdog", adsp_wdog_interrupt);
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if (ret < 0)
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goto free_rproc;
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adsp->wdog_irq = ret;
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ret = adsp_request_irq(adsp, pdev, "fatal", adsp_fatal_interrupt);
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if (ret < 0)
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goto free_rproc;
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adsp->fatal_irq = ret;
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ret = adsp_request_irq(adsp, pdev, "ready", adsp_ready_interrupt);
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if (ret < 0)
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goto free_rproc;
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adsp->ready_irq = ret;
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ret = adsp_request_irq(adsp, pdev, "handover", adsp_handover_interrupt);
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if (ret < 0)
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goto free_rproc;
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adsp->handover_irq = ret;
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ret = adsp_request_irq(adsp, pdev, "stop-ack", adsp_stop_ack_interrupt);
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if (ret < 0)
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goto free_rproc;
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adsp->stop_ack_irq = ret;
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adsp->state = qcom_smem_state_get(&pdev->dev, "stop",
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&adsp->stop_bit);
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if (IS_ERR(adsp->state)) {
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ret = PTR_ERR(adsp->state);
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goto free_rproc;
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}
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ret = rproc_add(rproc);
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if (ret)
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goto free_rproc;
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return 0;
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free_rproc:
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rproc_put(rproc);
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return ret;
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}
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static int adsp_remove(struct platform_device *pdev)
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{
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struct qcom_adsp *adsp = platform_get_drvdata(pdev);
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qcom_smem_state_put(adsp->state);
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rproc_del(adsp->rproc);
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rproc_put(adsp->rproc);
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return 0;
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}
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static const struct of_device_id adsp_of_match[] = {
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{ .compatible = "qcom,msm8974-adsp-pil" },
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{ .compatible = "qcom,msm8996-adsp-pil" },
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{ },
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};
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static struct platform_driver adsp_driver = {
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.probe = adsp_probe,
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.remove = adsp_remove,
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.driver = {
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.name = "qcom_adsp_pil",
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.of_match_table = adsp_of_match,
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},
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};
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module_platform_driver(adsp_driver);
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MODULE_DESCRIPTION("Qualcomm MSM8974/MSM8996 ADSP Peripherial Image Loader");
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MODULE_LICENSE("GPL v2");
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