linux/arch/mips/loongson1/common
Kelvin Cheung f29ad10de6 MIPS: Loongson1B: Some fixes/updates for LS1B
- Fix hanging ethernet issue of LS1B v2.0 by adding pbl field in plat data.
   (It seems that the MAC controller of LS1B v2.0 can only accept pbl=1)
 - Add GMAC1 support and setup MUX in terms of PHY mode.
 - Add CPUFreq support.
 - Add MUX Register Definitions.
 - Add PWM Register Definitions.
 - Update clock register bitfields according to the latest spec.
 - Update clock related stuff.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8024/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:09 +01:00
..
clock.c MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
irq.c MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
Makefile
platform.c MIPS: Loongson1B: Some fixes/updates for LS1B 2014-11-24 07:45:09 +01:00
prom.c MIPS: Loongson1B: Improve early printk 2014-11-24 07:45:09 +01:00
reset.c MIPS: Loongson1B: Fix reboot problem on LS1B 2014-11-24 07:45:09 +01:00
setup.c MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00