forked from Minki/linux
f27a85c498
In case posted-interrupt was delivered to CPU while it is in host (outside guest), then posted-interrupt delivery will be done by calling sync_pir_to_irr() at vmentry after interrupts are disabled. sync_pir_to_irr() will check vmx->pi_desc.control ON bit and if set, it will sync vmx->pi_desc.pir to IRR and afterwards update RVI to ensure virtual-interrupt-delivery will dispatch interrupt to guest. However, it is possible that L1 will receive a posted-interrupt while CPU runs at host and is about to enter L2. In this case, the call to sync_pir_to_irr() will indeed update the L1's APIC IRR but vcpu_enter_guest() will then just resume into L2 guest without re-evaluating if it should exit from L2 to L1 as a result of this new pending L1 event. To address this case, if sync_pir_to_irr() has a new L1 injectable interrupt and CPU is running L2, we force exit GUEST_MODE which will result in another iteration of vcpu_run() run loop which will call kvm_vcpu_running() which will call check_nested_events() which will handle the pending L1 event properly. Signed-off-by: Liran Alon <liran.alon@oracle.com> Reviewed-by: Nikita Leshenko <nikita.leshchenko@oracle.com> Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Reviewed-by: Liam Merwick <liam.merwick@oracle.com> Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> |
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.. | ||
cpuid.c | ||
cpuid.h | ||
debugfs.c | ||
emulate.c | ||
hyperv.c | ||
hyperv.h | ||
i8254.c | ||
i8254.h | ||
i8259.c | ||
ioapic.c | ||
ioapic.h | ||
irq_comm.c | ||
irq.c | ||
irq.h | ||
Kconfig | ||
kvm_cache_regs.h | ||
lapic.c | ||
lapic.h | ||
Makefile | ||
mmu_audit.c | ||
mmu.c | ||
mmu.h | ||
mmutrace.h | ||
mtrr.c | ||
page_track.c | ||
paging_tmpl.h | ||
pmu_amd.c | ||
pmu_intel.c | ||
pmu.c | ||
pmu.h | ||
svm.c | ||
trace.h | ||
tss.h | ||
vmx.c | ||
x86.c | ||
x86.h |