Maurice Petallo f25c33724d mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller ... This is to enable DDR50 bus speed mode with 1.8V signaling capability for BayTrail ACPI and PCI mode eMMC Controller. Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>		2014-07-10 14:58:29 +02:00
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card	MMC highlights for 3.15:	2014-04-09 08:39:39 -07:00
core	mmc: Allow forward compatibility for eMMC	2014-07-09 11:26:11 +02:00
host	mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller	2014-07-10 14:58:29 +02:00
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