forked from Minki/linux
f1e9203e23
Audio subsystem clocks are located in separate block. On Exynos 5420 if clock for this block (from main clock domain) 'mau_epll' is gated then any read or write to audss registers will block. This kind of boot hang was observed on Arndale Octa and Peach Pi/Pit after introducing runtime PM to pl330 DMA driver. After that commit the 'mau_epll' was gated, because the "amba" clock was disabled and there were no more users of mau_epll. The system hang on one of steps: 1. Disabling unused clocks from audss block. 2. During audss GPIO setup (just before probing i2s0 because samsung_pinmux_setup() tried to access memory from audss block which was gated. Add a workaround for this by enabling the 'mau_epll' clock in probe. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org> |
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| .. | ||
| clk-exynos4.c | ||
| clk-exynos7.c | ||
| clk-exynos3250.c | ||
| clk-exynos4415.c | ||
| clk-exynos5250.c | ||
| clk-exynos5260.c | ||
| clk-exynos5260.h | ||
| clk-exynos5410.c | ||
| clk-exynos5420.c | ||
| clk-exynos5440.c | ||
| clk-exynos-audss.c | ||
| clk-exynos-clkout.c | ||
| clk-pll.c | ||
| clk-pll.h | ||
| clk-s3c64xx.c | ||
| clk-s3c2410-dclk.c | ||
| clk-s3c2410.c | ||
| clk-s3c2412.c | ||
| clk-s3c2443.c | ||
| clk-s5pv210-audss.c | ||
| clk-s5pv210.c | ||
| clk.c | ||
| clk.h | ||
| Kconfig | ||
| Makefile | ||