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clk-div6.c
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clk: renesas: div6: Implement range checking
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2021-05-11 09:58:13 +02:00 |
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clk-div6.h
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We have two changes to the core framework this time around. The first being a
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2017-11-17 20:04:24 -08:00 |
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clk-emev2.c
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Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next
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2018-10-18 15:33:52 -07:00 |
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clk-mstp.c
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clk: renesas: Zero init clk_init_data
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2021-03-30 09:58:27 +02:00 |
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clk-r8a73a4.c
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clk: Remove io.h from clk-provider.h
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2019-05-15 13:21:37 -07:00 |
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clk-r8a7740.c
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clk: Remove io.h from clk-provider.h
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2019-05-15 13:21:37 -07:00 |
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clk-r8a7778.c
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Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next
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2018-10-18 15:33:52 -07:00 |
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clk-r8a7779.c
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Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next
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2018-10-18 15:33:52 -07:00 |
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clk-rz.c
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remove ioremap_nocache and devm_ioremap_nocache
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2020-01-06 09:45:59 +01:00 |
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clk-sh73a0.c
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clk: renesas: sh73a0: Stop using __raw_*() I/O accessors
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2020-12-10 08:34:01 +01:00 |
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Kconfig
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clk: renesas: cpg-mssr: Add support for R-Car S4-8
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2021-12-08 10:05:56 +01:00 |
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Makefile
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clk: renesas: cpg-mssr: Add support for R-Car S4-8
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2021-12-08 10:05:56 +01:00 |
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r7s9210-cpg-mssr.c
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clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag
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2020-09-17 15:30:08 +02:00 |
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r8a774a1-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a774b1-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a774c0-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a774e1-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a779a0-cpg-mssr.c
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clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver
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2021-12-08 10:05:22 +01:00 |
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r8a779f0-cpg-mssr.c
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clk: renesas: cpg-mssr: Add support for R-Car S4-8
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2021-12-08 10:05:56 +01:00 |
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r8a7742-cpg-mssr.c
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clk: renesas: r8a7742: Add clk entry for VSPR
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2020-09-04 09:42:01 +02:00 |
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r8a7743-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7745-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7790-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7791-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7792-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7794-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a7795-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a7796-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a77470-cpg-mssr.c
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clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)
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2020-09-04 09:42:01 +02:00 |
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r8a77965-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a77970-cpg-mssr.c
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clk: renesas: rcar-gen3: Mark RWDT clocks as critical
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2020-06-22 16:53:49 +02:00 |
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r8a77980-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a77990-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r8a77995-cpg-mssr.c
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clk: renesas: rcar-gen3: Add SDnH clock
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2021-11-19 11:27:58 +01:00 |
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r9a06g032-clocks.c
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clk: renesas: r9a06g032: Switch to .determine_rate()
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2021-05-11 10:00:40 +02:00 |
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r9a07g044-cpg.c
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clk: renesas: r9a07g044: Add GPU clock and reset entries
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2021-12-08 10:05:56 +01:00 |
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rcar-cpg-lib.c
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clk: renesas: rcar-gen3: Switch to new SD clock handling
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2021-11-19 11:32:39 +01:00 |
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rcar-cpg-lib.h
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clk: renesas: rcar-gen3: Switch to new SD clock handling
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2021-11-19 11:32:39 +01:00 |
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rcar-gen2-cpg.c
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clk: renesas: Zero init clk_init_data
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2021-03-30 09:58:27 +02:00 |
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rcar-gen2-cpg.h
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clk: renesas: rcar-gen2: Change multipliers and dividers to u8
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2019-12-10 10:24:10 +01:00 |
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rcar-gen3-cpg.c
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clk: renesas: rcar-gen3: Remove outdated SD_SKIP_FIRST
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2021-11-19 11:32:39 +01:00 |
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rcar-gen3-cpg.h
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clk: renesas: rcar-gen3: Add dummy SDnH clock
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2021-11-19 11:27:58 +01:00 |
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rcar-gen4-cpg.c
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clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver
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2021-12-08 10:05:22 +01:00 |
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rcar-gen4-cpg.h
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clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver
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2021-12-08 10:05:22 +01:00 |
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rcar-usb2-clock-sel.c
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clk: renesas: rcar-usb2-clock-sel: Fix kernel NULL pointer dereference
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2021-08-28 21:29:36 -07:00 |
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renesas-cpg-mssr.c
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clk: renesas: cpg-mssr: Add support for R-Car S4-8
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2021-12-08 10:05:56 +01:00 |
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renesas-cpg-mssr.h
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clk: renesas: cpg-mssr: Add support for R-Car S4-8
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2021-12-08 10:05:56 +01:00 |
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rzg2l-cpg.c
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clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
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2021-11-19 11:37:03 +01:00 |
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rzg2l-cpg.h
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clk: renesas: r9a07g044: Add mux and divider for G clock
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2021-12-08 10:05:56 +01:00 |
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