forked from Minki/linux
eb08375ea6
The MPU initialisation on the primary core is performed in two stages, one minimal stage to ensure the CPU can boot and a second one after sanity_check_meminfo. As the memory configuration is known by the time we boot secondary cores only a single step is necessary, provided the values for DRSR are passed to secondaries. This patch implements this arrangement. The configuration generated for the MPU regions is made available to the secondary core, which can then use the asm MPU intialisation code to program a complete region configuration. This is necessary for SMP configurations without an MMU, as the MPU initialisation is the only way to ensure that memory is specified as 'shared'. Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> CC: Nicolas Pitre <nico@linaro.org>
121 lines
2.8 KiB
C
121 lines
2.8 KiB
C
/*
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* arch/arm/include/asm/smp.h
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*
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* Copyright (C) 2004-2005 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_SMP_H
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#define __ASM_ARM_SMP_H
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/thread_info.h>
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#ifndef CONFIG_SMP
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# error "<asm/smp.h> included in non-SMP build"
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#endif
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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struct seq_file;
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/*
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* generate IPI list text
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*/
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extern void show_ipi_list(struct seq_file *, int);
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/*
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* Called from assembly code, this handles an IPI.
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*/
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asmlinkage void do_IPI(int ipinr, struct pt_regs *regs);
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/*
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* Called from C code, this handles an IPI.
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*/
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void handle_IPI(int ipinr, struct pt_regs *regs);
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/*
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* Setup the set of possible CPUs (via set_cpu_possible)
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*/
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extern void smp_init_cpus(void);
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/*
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* Provide a function to raise an IPI cross call on CPUs in callmap.
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*/
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extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
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/*
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* Boot a secondary CPU, and assign it the specified idle task.
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* This also gives us the initial stack to use for this CPU.
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*/
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extern int boot_secondary(unsigned int cpu, struct task_struct *);
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/*
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* Called from platform specific assembly code, this is the
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* secondary CPU entry point.
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*/
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asmlinkage void secondary_start_kernel(void);
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/*
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* Initial data for bringing up a secondary CPU.
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*/
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struct secondary_data {
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union {
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unsigned long mpu_rgn_szr;
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unsigned long pgdir;
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};
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unsigned long swapper_pg_dir;
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void *stack;
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};
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extern struct secondary_data secondary_data;
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extern volatile int pen_release;
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern void cpu_die(void);
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask);
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struct smp_operations {
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#ifdef CONFIG_SMP
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/*
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* Setup the set of possible CPUs (via set_cpu_possible)
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*/
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void (*smp_init_cpus)(void);
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/*
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* Initialize cpu_possible map, and enable coherency
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*/
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void (*smp_prepare_cpus)(unsigned int max_cpus);
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/*
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* Perform platform specific initialisation of the specified CPU.
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*/
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void (*smp_secondary_init)(unsigned int cpu);
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/*
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* Boot a secondary CPU, and assign it the specified idle task.
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* This also gives us the initial stack to use for this CPU.
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*/
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int (*smp_boot_secondary)(unsigned int cpu, struct task_struct *idle);
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#ifdef CONFIG_HOTPLUG_CPU
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int (*cpu_kill)(unsigned int cpu);
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void (*cpu_die)(unsigned int cpu);
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int (*cpu_disable)(unsigned int cpu);
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#endif
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#endif
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};
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/*
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* set platform specific SMP operations
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*/
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extern void smp_set_ops(struct smp_operations *);
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#endif /* ifndef __ASM_ARM_SMP_H */
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