forked from Minki/linux
02b4e2756e
All ARMv5 and older CPUs invalidate their caches in the early assembly setup function, prior to enabling the MMU. This is because the L1 cache should not contain any data relevant to the execution of the kernel at this point; all data should have been flushed out to memory. This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed, these typically do not search their caches when caching is disabled (as it needs to be when the MMU is disabled) so this change should be safe. ARMv7 allows there to be CPUs which search their caches while caching is disabled, and it's permitted that the cache is uninitialised at boot; for these, the architecture reference manual requires that an implementation specific code sequence is used immediately after reset to ensure that the cache is placed into a sane state. Such functionality is definitely outside the remit of the Linux kernel, and must be done by the SoC's firmware before _any_ CPU gets to the Linux kernel. Changing the data cache clean+invalidate to a mere invalidate allows us to get rid of a lot of platform specific hacks around this issue for their secondary CPU bringup paths - some of which were buggy. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
99 lines
2.2 KiB
C
99 lines
2.2 KiB
C
/*
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* Copyright (C) 2014 Marvell Technology Group Ltd.
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*
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* Antoine Ténart <antoine.tenart@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#define CPU_RESET 0x00
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#define RESET_VECT 0x00
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#define SW_RESET_ADDR 0x94
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extern u32 boot_inst;
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static void __iomem *cpu_ctrl;
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static inline void berlin_perform_reset_cpu(unsigned int cpu)
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{
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u32 val;
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val = readl(cpu_ctrl + CPU_RESET);
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val |= BIT(cpu_logical_map(cpu));
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writel(val, cpu_ctrl + CPU_RESET);
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}
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static int berlin_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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if (!cpu_ctrl)
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return -EFAULT;
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/*
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* Reset the CPU, making it to execute the instruction in the reset
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* exception vector.
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*/
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berlin_perform_reset_cpu(cpu);
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return 0;
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}
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static void __init berlin_smp_prepare_cpus(unsigned int max_cpus)
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{
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struct device_node *np;
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void __iomem *scu_base;
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void __iomem *vectors_base;
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np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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scu_base = of_iomap(np, 0);
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of_node_put(np);
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if (!scu_base)
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return;
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np = of_find_compatible_node(NULL, NULL, "marvell,berlin-cpu-ctrl");
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cpu_ctrl = of_iomap(np, 0);
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of_node_put(np);
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if (!cpu_ctrl)
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goto unmap_scu;
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vectors_base = ioremap(CONFIG_VECTORS_BASE, SZ_32K);
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if (!vectors_base)
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goto unmap_scu;
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scu_enable(scu_base);
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flush_cache_all();
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/*
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* Write the first instruction the CPU will execute after being reset
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* in the reset exception vector.
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*/
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writel(boot_inst, vectors_base + RESET_VECT);
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/*
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* Write the secondary startup address into the SW reset address
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* vector. This is used by boot_inst.
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*/
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writel(virt_to_phys(secondary_startup), vectors_base + SW_RESET_ADDR);
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iounmap(vectors_base);
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unmap_scu:
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iounmap(scu_base);
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}
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static struct smp_operations berlin_smp_ops __initdata = {
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.smp_prepare_cpus = berlin_smp_prepare_cpus,
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.smp_boot_secondary = berlin_boot_secondary,
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};
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CPU_METHOD_OF_DECLARE(berlin_smp, "marvell,berlin-smp", &berlin_smp_ops);
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