forked from Minki/linux
63139885c4
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the miphy365 phy driver to access sysconfig register offsets via syscfg dt property. This is because the reg property should not be mixing address spaces like it does currently for miphy365. This change then also aligns us to how other platforms such as keystone and bcm7445 pass there syscon offsets via DT. This patch breaks DT compatibility, but this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. This change has been done as a single atomic commit to ensure it is bisectable. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
78 lines
2.4 KiB
Plaintext
78 lines
2.4 KiB
Plaintext
STMicroelectronics STi MIPHY365x PHY binding
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============================================
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This binding describes a miphy device that is used to control PHY hardware
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for SATA and PCIe.
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Required properties (controller (parent) node):
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- compatible : Should be "st,miphy365x-phy"
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- st,syscfg : Phandle / integer array property. Phandle of sysconfig group
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containing the miphy registers and integer array should contain
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an entry for each port sub-node, specifying the control
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register offset inside the sysconfig group.
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Required nodes : A sub-node is required for each channel the controller
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provides. Address range information including the usual
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'reg' and 'reg-names' properties are used inside these
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nodes to describe the controller's topology. These nodes
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are translated by the driver's .xlate() function.
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Required properties (port (child) node):
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- #phy-cells : Should be 1 (See second example)
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Cell after port phandle is device type from:
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- MIPHY_TYPE_SATA
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- MIPHY_TYPE_PCI
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- reg : Address and length of register sets for each device in
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"reg-names"
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- reg-names : The names of the register addresses corresponding to the
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registers filled in "reg":
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- sata: For SATA devices
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- pcie: For PCIe devices
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Optional properties (port (child) node):
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- st,sata-gen : Generation of locally attached SATA IP. Expected values
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are {1,2,3). If not supplied generation 1 hardware will
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be expected
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- st,pcie-tx-pol-inv : Bool property to invert the polarity PCIe Tx (Txn/Txp)
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- st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp)
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Example:
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miphy365x_phy: miphy365x@fe382000 {
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compatible = "st,miphy365x-phy";
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st,syscfg = <&syscfg_rear 0x824 0x828>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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phy_port0: port@fe382000 {
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reg = <0xfe382000 0x100>, <0xfe394000 0x100>;
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reg-names = "sata", "pcie";
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#phy-cells = <1>;
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st,sata-gen = <3>;
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};
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phy_port1: port@fe38a000 {
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reg = <0xfe38a000 0x100>, <0xfe804000 0x100>;;
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reg-names = "sata", "pcie", "syscfg";
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#phy-cells = <1>;
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st,pcie-tx-pol-inv;
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};
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};
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Specifying phy control of devices
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=================================
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Device nodes should specify the configuration required in their "phys"
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property, containing a phandle to the phy port node and a device type.
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Example:
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#include <dt-bindings/phy/phy-miphy365x.h>
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sata0: sata@fe380000 {
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...
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phys = <&phy_port0 MIPHY_TYPE_SATA>;
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...
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};
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