forked from Minki/linux
efc7f49c87
For OMAP4430 PMU events are routed to the CPU via the cross trigger interface
(CTI) because there are no dedicated interrupts. In order to route the PMU
events via the CTI IRQs, the following modules must be enabled:
l3_instr, l3_main_3, debugss
Therefore, build the arm-pmu device via these three HWMODs.
However, the CTI support for this platform still needs some work. Until
that's finished, temporarily disable the PMU on OMAP4430.
Cc: Ming Lei <ming.lei@canonical.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Ming Lei <ming.lei@canonical.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
[paul@pwsan.com: temporarily disabled OMAP4430 PMU support until a
better CTI interface can be implemented; added patch description note]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
91 lines
2.5 KiB
C
91 lines
2.5 KiB
C
/*
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* OMAP2 ARM Performance Monitoring Unit (PMU) Support
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*
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* Copyright (C) 2012 Texas Instruments, Inc.
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*
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* Contacts:
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* Jon Hunter <jon-hunter@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <asm/pmu.h>
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#include <plat/omap_hwmod.h>
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#include <plat/omap_device.h>
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static char *omap2_pmu_oh_names[] = {"mpu"};
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static char *omap3_pmu_oh_names[] = {"mpu", "debugss"};
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static char *omap4430_pmu_oh_names[] = {"l3_main_3", "l3_instr", "debugss"};
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static struct platform_device *omap_pmu_dev;
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/**
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* omap2_init_pmu - creates and registers PMU platform device
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* @oh_num: Number of OMAP HWMODs required to create PMU device
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* @oh_names: Array of OMAP HWMODS names required to create PMU device
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*
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* Uses OMAP HWMOD framework to create and register an ARM PMU device
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* from a list of HWMOD names passed. Currently supports OMAP2, OMAP3
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* and OMAP4430 devices.
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*/
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static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[])
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{
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int i;
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struct omap_hwmod *oh[3];
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char *dev_name = "arm-pmu";
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if ((!oh_num) || (oh_num > 3))
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return -EINVAL;
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for (i = 0; i < oh_num; i++) {
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oh[i] = omap_hwmod_lookup(oh_names[i]);
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if (!oh[i]) {
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pr_err("Could not look up %s hwmod\n", oh_names[i]);
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return -ENODEV;
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}
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}
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omap_pmu_dev = omap_device_build_ss(dev_name, -1, oh, oh_num, NULL, 0,
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NULL, 0, 0);
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WARN(IS_ERR(omap_pmu_dev), "Can't build omap_device for %s.\n",
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dev_name);
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return IS_ERR(omap_pmu_dev) ? PTR_ERR(omap_pmu_dev) : 0;
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}
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static int __init omap_init_pmu(void)
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{
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unsigned oh_num;
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char **oh_names;
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/*
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* To create an ARM-PMU device the following HWMODs
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* are required for the various OMAP2+ devices.
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*
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* OMAP24xx: mpu
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* OMAP3xxx: mpu, debugss
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* OMAP4430: l3_main_3, l3_instr, debugss
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*/
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if (cpu_is_omap24xx()) {
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oh_num = ARRAY_SIZE(omap2_pmu_oh_names);
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oh_names = omap2_pmu_oh_names;
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} else if (cpu_is_omap34xx()) {
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oh_num = ARRAY_SIZE(omap3_pmu_oh_names);
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oh_names = omap3_pmu_oh_names;
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} else if (cpu_is_omap443x()) {
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oh_num = ARRAY_SIZE(omap4430_pmu_oh_names);
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oh_names = omap4430_pmu_oh_names;
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/* XXX Remove the next two lines when CTI driver available */
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pr_info("ARM PMU: not yet supported on OMAP4430 due to missing CTI driver\n");
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return 0;
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} else {
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return 0;
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}
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return omap2_init_pmu(oh_num, oh_names);
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}
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subsys_initcall(omap_init_pmu);
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