linux/drivers/gpu
fred gao ef75c68586 drm/i915/gvt: Correct the privilege shadow batch buffer address
Once the ring buffer is copied to ring_scan_buffer and scanned,
the shadow batch buffer start address is only updated into
ring_scan_buffer, not the real ring address allocated through
intel_ring_begin in later copy_workload_to_ring_buffer.

This patch is only to set the right shadow batch buffer address
from Ring buffer, not include the shadow_wa_ctx.

v2:
- refine some comments. (Zhenyu)
v3:
- fix typo in title. (Zhenyu)
v4:
- remove the unnecessary comments. (Zhenyu)
- add comments in bb_start_cmd_va update. (Zhenyu)

Fixes: 0a53bc07f0 ("drm/i915/gvt: Separate cmd scan from request allocation")
Cc: stable@vger.kernel.org  # v4.15
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Yulei Zhang <yulei.zhang@intel.com>
Signed-off-by: fred gao <fred.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-03-15 15:06:26 +08:00
..
drm drm/i915/gvt: Correct the privilege shadow batch buffer address 2018-03-15 15:06:26 +08:00
host1x gpu: host1x: Use IOMMU groups 2017-12-21 14:52:36 +01:00
ipu-v3 gpu: ipu-csi: add 10/12-bit grayscale support to mbus_code_to_bus_cfg 2018-02-19 15:13:05 +01:00
vga vfs: do bulk POLL* -> EPOLL* replacement 2018-02-11 14:34:03 -08:00
Makefile