forked from Minki/linux
49ec5b2e5a
Previously, SMP block allocation was not checked in the plane's atomic_check() fxn, so we could fail allocation SMP block allocation at atomic_update() time. Re-work the block allocation to request blocks during atomic_check(), but not update the hw until committing the atomic update. Since SMP blocks allocated at atomic_check() time, we need to manage the SMP state as part of mdp5_state (global atomic state). This actually ends up significantly simplifying the SMP management, as the SMP module does not need to manage the intermediate state between assigning new blocks before setting flush bits and releasing old blocks after vblank. (The SMP registers and SMP allocation is not double-buffered, so newly allocated blocks need to be updated in kms->prepare_commit() released blocks in kms->complete_commit().) Signed-off-by: Rob Clark <robdclark@gmail.com>
57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/*
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* Copyright (C) 2016 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MDP5_PIPE_H__
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#define __MDP5_PIPE_H__
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#define SSPP_MAX (SSPP_RGB3 + 1) /* TODO: Add SSPP_MAX in mdp5.xml.h */
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/* represents a hw pipe, which is dynamically assigned to a plane */
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struct mdp5_hw_pipe {
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int idx;
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const char *name;
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enum mdp5_pipe pipe;
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spinlock_t pipe_lock; /* protect REG_MDP5_PIPE_* registers */
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uint32_t reg_offset;
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uint32_t caps;
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uint32_t flush_mask; /* used to commit pipe registers */
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/* number of smp blocks per plane, ie:
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* nblks_y | (nblks_u << 8) | (nblks_v << 16)
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*/
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uint32_t blkcfg;
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};
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/* global atomic state of assignment between pipes and planes: */
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struct mdp5_hw_pipe_state {
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struct drm_plane *hwpipe_to_plane[SSPP_MAX];
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};
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struct mdp5_hw_pipe *__must_check
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mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane,
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uint32_t caps, uint32_t blkcfg);
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void mdp5_pipe_release(struct drm_atomic_state *s, struct mdp5_hw_pipe *hwpipe);
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struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe,
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uint32_t reg_offset, uint32_t caps);
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void mdp5_pipe_destroy(struct mdp5_hw_pipe *hwpipe);
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#endif /* __MDP5_PIPE_H__ */
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