forked from Minki/linux
ee36027427
most of the clock tree structures on i.MX6 Quad Plus are same as on i.MX6Q. there still some differences between these two SOCs. compared to the i.XM6Q, the differents of clocks on i.MX6QP is mainly on: 1. New clock gate added to support the PRE and PRG modules 2. 24MHz OSC clock option added to the UART, IPG, ECSPI, and CAN clock roots. 3. MMDC channel 1 clock gate is now controllable. 4. clock gating added to the LDB_DIx_IPU clocks on i.MX6QP 5. EMI clock root divider fix 6. other updates fo CSCMRx, CSCDRx and CS2CDR registers. detailed infomation, please refer to the i.MX6QP RM. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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clk-busy.c | ||
clk-cpu.c | ||
clk-fixup-div.c | ||
clk-fixup-mux.c | ||
clk-gate2.c | ||
clk-gate-exclusive.c | ||
clk-imx1.c | ||
clk-imx6q.c | ||
clk-imx6sl.c | ||
clk-imx6sx.c | ||
clk-imx6ul.c | ||
clk-imx7d.c | ||
clk-imx21.c | ||
clk-imx25.c | ||
clk-imx27.c | ||
clk-imx31.c | ||
clk-imx35.c | ||
clk-imx51-imx53.c | ||
clk-pfd.c | ||
clk-pllv1.c | ||
clk-pllv2.c | ||
clk-pllv3.c | ||
clk-vf610.c | ||
clk.c | ||
clk.h | ||
Makefile |