forked from Minki/linux
eac68e8f97
This patch removes "Enable USB3 LPM Capability" option from Kconfig and adds snps,usb3_lpm_capable devicetree property instead of it. USB3 LPM (Link Power Management) capability is hardware property, and it's platform dependent, so if our hardware supports this feature, we want rather to configure it in devicetree than having it as Kconfig option. Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
51 lines
2.2 KiB
Plaintext
51 lines
2.2 KiB
Plaintext
synopsys DWC3 CORE
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DWC3- USB3 CONTROLLER
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Required properties:
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- compatible: must be "snps,dwc3"
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- reg : Address and length of the register set for the device
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- interrupts: Interrupts used by the dwc3 controller.
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Optional properties:
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- usb-phy : array of phandle for the PHY device. The first element
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in the array is expected to be a handle to the USB2/HS PHY and
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the second element is expected to be a handle to the USB3/SS PHY
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- phys: from the *Generic PHY* bindings
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- phy-names: from the *Generic PHY* bindings
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- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
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- snps,usb3_lpm_capable: determines if platform is USB3 LPM capable
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- snps,disable_scramble_quirk: true when SW should disable data scrambling.
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Only really useful for FPGA builds.
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- snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
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- snps,lpm-nyet-threshold: LPM NYET threshold
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- snps,u2exit_lfps_quirk: set if we want to enable u2exit lfps quirk
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- snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
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- snps,req_p1p2p3_quirk: when set, the core will always request for
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P1/P2/P3 transition sequence.
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- snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
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amount of 8B10B errors occur.
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- snps,del_phy_power_chg_quirk: when set core will delay PHY power change
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from P0 to P1/P2/P3.
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- snps,lfps_filter_quirk: when set core will filter LFPS reception.
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- snps,rx_detect_poll_quirk: when set core will disable a 400us delay to start
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Polling LFPS after RX.Detect.
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- snps,tx_de_emphasis_quirk: when set core will set Tx de-emphasis value.
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- snps,tx_de_emphasis: the value driven to the PHY is controlled by the
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LTSSM during USB3 Compliance mode.
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- snps,dis_u3_susphy_quirk: when set core will disable USB3 suspend phy.
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- snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
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- snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
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utmi_l1_suspend_n, false when asserts utmi_sleep_n
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- snps,hird-threshold: HIRD threshold
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This is usually a subnode to DWC3 glue to which it is connected.
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dwc3@4a030000 {
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compatible = "snps,dwc3";
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reg = <0x4a030000 0xcfff>;
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interrupts = <0 92 4>
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usb-phy = <&usb2_phy>, <&usb3,phy>;
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tx-fifo-resize;
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};
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