forked from Minki/linux
ec20a81562
Now that nothing is using this anymore, kill off the assignments across the board. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
681 lines
16 KiB
C
681 lines
16 KiB
C
/*
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* Renesas - AP-325RXA
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* (Compatible with Algo System ., LTD. - AP-320A)
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*
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* Copyright (C) 2008 Renesas Solutions Corp.
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* Author : Yusuke Goda <goda.yuske@renesas.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sh_mobile_sdhi.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/sh_flctl.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/smsc911x.h>
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#include <linux/gpio.h>
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#include <media/ov772x.h>
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#include <media/soc_camera.h>
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#include <media/soc_camera_platform.h>
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#include <media/sh_mobile_ceu.h>
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#include <video/sh_mobile_lcdc.h>
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#include <asm/io.h>
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#include <asm/clock.h>
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#include <asm/suspend.h>
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#include <cpu/sh7723.h>
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static struct smsc911x_platform_config smsc911x_config = {
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.phy_interface = PHY_INTERFACE_MODE_MII,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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.flags = SMSC911X_USE_32BIT,
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};
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static struct resource smsc9118_resources[] = {
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[0] = {
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.start = 0xb6080000,
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.end = 0xb60fffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 35,
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.end = 35,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device smsc9118_device = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(smsc9118_resources),
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.resource = smsc9118_resources,
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.dev = {
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.platform_data = &smsc911x_config,
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},
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};
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/*
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* AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
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* If this area erased, this board can not boot.
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*/
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static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
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{
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.name = "uboot",
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.offset = 0,
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.size = (1 * 1024 * 1024),
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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}, {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = (2 * 1024 * 1024),
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}, {
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.name = "free-area0",
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.offset = MTDPART_OFS_APPEND,
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.size = ((7 * 1024 * 1024) + (512 * 1024)),
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}, {
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.name = "CPLD-Data",
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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.size = (1024 * 128 * 2),
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}, {
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.name = "free-area1",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data ap325rxa_nor_flash_data = {
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.width = 2,
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.parts = ap325rxa_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
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};
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static struct resource ap325rxa_nor_flash_resources[] = {
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[0] = {
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.name = "NOR Flash",
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.start = 0x00000000,
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.end = 0x00ffffff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device ap325rxa_nor_flash_device = {
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.name = "physmap-flash",
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.resource = ap325rxa_nor_flash_resources,
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.num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
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.dev = {
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.platform_data = &ap325rxa_nor_flash_data,
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},
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};
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static struct mtd_partition nand_partition_info[] = {
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{
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.name = "nand_data",
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.offset = 0,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct resource nand_flash_resources[] = {
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[0] = {
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.start = 0xa4530000,
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.end = 0xa45300ff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct sh_flctl_platform_data nand_flash_data = {
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.parts = nand_partition_info,
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.nr_parts = ARRAY_SIZE(nand_partition_info),
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.flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
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.has_hwecc = 1,
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};
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static struct platform_device nand_flash_device = {
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.name = "sh_flctl",
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.resource = nand_flash_resources,
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.num_resources = ARRAY_SIZE(nand_flash_resources),
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.dev = {
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.platform_data = &nand_flash_data,
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},
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};
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#define FPGA_LCDREG 0xB4100180
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#define FPGA_BKLREG 0xB4100212
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#define FPGA_LCDREG_VAL 0x0018
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#define PORT_MSELCRB 0xA4050182
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#define PORT_HIZCRC 0xA405015C
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#define PORT_DRVCRA 0xA405018A
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#define PORT_DRVCRB 0xA405018C
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static int ap320_wvga_set_brightness(void *board_data, int brightness)
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{
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if (brightness) {
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gpio_set_value(GPIO_PTS3, 0);
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__raw_writew(0x100, FPGA_BKLREG);
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} else {
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__raw_writew(0, FPGA_BKLREG);
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gpio_set_value(GPIO_PTS3, 1);
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}
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return 0;
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}
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static int ap320_wvga_get_brightness(void *board_data)
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{
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return gpio_get_value(GPIO_PTS3);
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}
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static void ap320_wvga_power_on(void *board_data, struct fb_info *info)
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{
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msleep(100);
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/* ASD AP-320/325 LCD ON */
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__raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
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}
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static void ap320_wvga_power_off(void *board_data)
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{
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/* ASD AP-320/325 LCD OFF */
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__raw_writew(0, FPGA_LCDREG);
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}
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static const struct fb_videomode ap325rxa_lcdc_modes[] = {
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{
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.name = "LB070WV1",
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.xres = 800,
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.yres = 480,
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.left_margin = 32,
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.right_margin = 160,
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.hsync_len = 8,
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.upper_margin = 63,
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.lower_margin = 80,
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.vsync_len = 1,
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.sync = 0, /* hsync and vsync are active low */
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},
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};
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static struct sh_mobile_lcdc_info lcdc_info = {
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.clock_source = LCDC_CLK_EXTERNAL,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.bpp = 16,
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.interface_type = RGB18,
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.clock_divider = 1,
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.lcd_cfg = ap325rxa_lcdc_modes,
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.num_cfg = ARRAY_SIZE(ap325rxa_lcdc_modes),
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.lcd_size_cfg = { /* 7.0 inch */
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.width = 152,
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.height = 91,
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},
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.board_cfg = {
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.display_on = ap320_wvga_power_on,
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.display_off = ap320_wvga_power_off,
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.set_brightness = ap320_wvga_set_brightness,
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.get_brightness = ap320_wvga_get_brightness,
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},
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.bl_info = {
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.name = "sh_mobile_lcdc_bl",
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.max_brightness = 1,
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},
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}
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};
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static struct resource lcdc_resources[] = {
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[0] = {
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.name = "LCDC",
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.start = 0xfe940000, /* P4-only space */
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.end = 0xfe942fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 28,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device lcdc_device = {
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.name = "sh_mobile_lcdc_fb",
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.num_resources = ARRAY_SIZE(lcdc_resources),
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.resource = lcdc_resources,
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.dev = {
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.platform_data = &lcdc_info,
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},
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};
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static void camera_power(int val)
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{
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gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
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mdelay(10);
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}
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#ifdef CONFIG_I2C
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/* support for the old ncm03j camera */
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static unsigned char camera_ncm03j_magic[] =
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{
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0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
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0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
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0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
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0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
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0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
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0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
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0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
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0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
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0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
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0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
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0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
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0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
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0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
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0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
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0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
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0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
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};
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static int camera_probe(void)
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{
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struct i2c_adapter *a = i2c_get_adapter(0);
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struct i2c_msg msg;
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int ret;
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if (!a)
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return -ENODEV;
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camera_power(1);
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msg.addr = 0x6e;
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msg.buf = camera_ncm03j_magic;
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msg.len = 2;
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msg.flags = 0;
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ret = i2c_transfer(a, &msg, 1);
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camera_power(0);
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return ret;
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}
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static int camera_set_capture(struct soc_camera_platform_info *info,
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int enable)
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{
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struct i2c_adapter *a = i2c_get_adapter(0);
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struct i2c_msg msg;
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int ret = 0;
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int i;
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camera_power(0);
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if (!enable)
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return 0; /* no disable for now */
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camera_power(1);
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for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
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u_int8_t buf[8];
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msg.addr = 0x6e;
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msg.buf = buf;
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msg.len = 2;
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msg.flags = 0;
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buf[0] = camera_ncm03j_magic[i];
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buf[1] = camera_ncm03j_magic[i + 1];
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ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
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}
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return ret;
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}
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static int ap325rxa_camera_add(struct soc_camera_device *icd);
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static void ap325rxa_camera_del(struct soc_camera_device *icd);
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static struct soc_camera_platform_info camera_info = {
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.format_name = "UYVY",
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.format_depth = 16,
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.format = {
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.code = V4L2_MBUS_FMT_UYVY8_2X8,
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.colorspace = V4L2_COLORSPACE_SMPTE170M,
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.field = V4L2_FIELD_NONE,
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.width = 640,
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.height = 480,
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},
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.mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
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V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
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V4L2_MBUS_DATA_ACTIVE_HIGH,
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.mbus_type = V4L2_MBUS_PARALLEL,
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.set_capture = camera_set_capture,
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};
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static struct soc_camera_link camera_link = {
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.bus_id = 0,
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.add_device = ap325rxa_camera_add,
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.del_device = ap325rxa_camera_del,
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.module_name = "soc_camera_platform",
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.priv = &camera_info,
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};
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static struct platform_device *camera_device;
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static void ap325rxa_camera_release(struct device *dev)
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{
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soc_camera_platform_release(&camera_device);
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}
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static int ap325rxa_camera_add(struct soc_camera_device *icd)
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{
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int ret = soc_camera_platform_add(icd, &camera_device, &camera_link,
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ap325rxa_camera_release, 0);
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if (ret < 0)
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return ret;
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ret = camera_probe();
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if (ret < 0)
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soc_camera_platform_del(icd, camera_device, &camera_link);
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return ret;
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}
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static void ap325rxa_camera_del(struct soc_camera_device *icd)
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{
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soc_camera_platform_del(icd, camera_device, &camera_link);
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}
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#endif /* CONFIG_I2C */
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static int ov7725_power(struct device *dev, int mode)
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{
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camera_power(0);
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if (mode)
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camera_power(1);
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return 0;
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}
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static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
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.flags = SH_CEU_FLAG_USE_8BIT_BUS,
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};
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static struct resource ceu_resources[] = {
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[0] = {
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.name = "CEU",
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.start = 0xfe910000,
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.end = 0xfe91009f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 52,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* place holder for contiguous memory */
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},
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};
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static struct platform_device ceu_device = {
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.name = "sh_mobile_ceu",
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.id = 0, /* "ceu0" clock */
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.num_resources = ARRAY_SIZE(ceu_resources),
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.resource = ceu_resources,
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.dev = {
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.platform_data = &sh_mobile_ceu_info,
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},
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};
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static struct resource sdhi0_cn3_resources[] = {
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[0] = {
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.name = "SDHI0",
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.start = 0x04ce0000,
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.end = 0x04ce00ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 100,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_mobile_sdhi_info sdhi0_cn3_data = {
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.tmio_caps = MMC_CAP_SDIO_IRQ,
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};
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static struct platform_device sdhi0_cn3_device = {
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.name = "sh_mobile_sdhi",
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.id = 0, /* "sdhi0" clock */
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.num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
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.resource = sdhi0_cn3_resources,
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.dev = {
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.platform_data = &sdhi0_cn3_data,
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},
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};
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static struct resource sdhi1_cn7_resources[] = {
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[0] = {
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.name = "SDHI1",
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.start = 0x04cf0000,
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.end = 0x04cf00ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 23,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_mobile_sdhi_info sdhi1_cn7_data = {
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.tmio_caps = MMC_CAP_SDIO_IRQ,
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};
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static struct platform_device sdhi1_cn7_device = {
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.name = "sh_mobile_sdhi",
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.id = 1, /* "sdhi1" clock */
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.num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
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.resource = sdhi1_cn7_resources,
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.dev = {
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.platform_data = &sdhi1_cn7_data,
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},
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};
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static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
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{
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I2C_BOARD_INFO("pcf8563", 0x51),
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},
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};
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static struct i2c_board_info ap325rxa_i2c_camera[] = {
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{
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I2C_BOARD_INFO("ov772x", 0x21),
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},
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|
};
|
|
|
|
static struct ov772x_camera_info ov7725_info = {
|
|
.flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
|
|
.edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
|
|
};
|
|
|
|
static struct soc_camera_link ov7725_link = {
|
|
.bus_id = 0,
|
|
.power = ov7725_power,
|
|
.board_info = &ap325rxa_i2c_camera[0],
|
|
.i2c_adapter_id = 0,
|
|
.priv = &ov7725_info,
|
|
};
|
|
|
|
static struct platform_device ap325rxa_camera[] = {
|
|
{
|
|
.name = "soc-camera-pdrv",
|
|
.id = 0,
|
|
.dev = {
|
|
.platform_data = &ov7725_link,
|
|
},
|
|
}, {
|
|
.name = "soc-camera-pdrv",
|
|
.id = 1,
|
|
.dev = {
|
|
.platform_data = &camera_link,
|
|
},
|
|
},
|
|
};
|
|
|
|
static struct platform_device *ap325rxa_devices[] __initdata = {
|
|
&smsc9118_device,
|
|
&ap325rxa_nor_flash_device,
|
|
&lcdc_device,
|
|
&ceu_device,
|
|
&nand_flash_device,
|
|
&sdhi0_cn3_device,
|
|
&sdhi1_cn7_device,
|
|
&ap325rxa_camera[0],
|
|
&ap325rxa_camera[1],
|
|
};
|
|
|
|
extern char ap325rxa_sdram_enter_start;
|
|
extern char ap325rxa_sdram_enter_end;
|
|
extern char ap325rxa_sdram_leave_start;
|
|
extern char ap325rxa_sdram_leave_end;
|
|
|
|
static int __init ap325rxa_devices_setup(void)
|
|
{
|
|
/* register board specific self-refresh code */
|
|
sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
|
|
&ap325rxa_sdram_enter_start,
|
|
&ap325rxa_sdram_enter_end,
|
|
&ap325rxa_sdram_leave_start,
|
|
&ap325rxa_sdram_leave_end);
|
|
|
|
/* LD3 and LD4 LEDs */
|
|
gpio_request(GPIO_PTX5, NULL); /* RUN */
|
|
gpio_direction_output(GPIO_PTX5, 1);
|
|
gpio_export(GPIO_PTX5, 0);
|
|
|
|
gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
|
|
gpio_direction_output(GPIO_PTX4, 0);
|
|
gpio_export(GPIO_PTX4, 0);
|
|
|
|
/* SW1 input */
|
|
gpio_request(GPIO_PTF7, NULL); /* MODE */
|
|
gpio_direction_input(GPIO_PTF7);
|
|
gpio_export(GPIO_PTF7, 0);
|
|
|
|
/* LCDC */
|
|
gpio_request(GPIO_FN_LCDD15, NULL);
|
|
gpio_request(GPIO_FN_LCDD14, NULL);
|
|
gpio_request(GPIO_FN_LCDD13, NULL);
|
|
gpio_request(GPIO_FN_LCDD12, NULL);
|
|
gpio_request(GPIO_FN_LCDD11, NULL);
|
|
gpio_request(GPIO_FN_LCDD10, NULL);
|
|
gpio_request(GPIO_FN_LCDD9, NULL);
|
|
gpio_request(GPIO_FN_LCDD8, NULL);
|
|
gpio_request(GPIO_FN_LCDD7, NULL);
|
|
gpio_request(GPIO_FN_LCDD6, NULL);
|
|
gpio_request(GPIO_FN_LCDD5, NULL);
|
|
gpio_request(GPIO_FN_LCDD4, NULL);
|
|
gpio_request(GPIO_FN_LCDD3, NULL);
|
|
gpio_request(GPIO_FN_LCDD2, NULL);
|
|
gpio_request(GPIO_FN_LCDD1, NULL);
|
|
gpio_request(GPIO_FN_LCDD0, NULL);
|
|
gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
|
|
gpio_request(GPIO_FN_LCDDCK, NULL);
|
|
gpio_request(GPIO_FN_LCDVEPWC, NULL);
|
|
gpio_request(GPIO_FN_LCDVCPWC, NULL);
|
|
gpio_request(GPIO_FN_LCDVSYN, NULL);
|
|
gpio_request(GPIO_FN_LCDHSYN, NULL);
|
|
gpio_request(GPIO_FN_LCDDISP, NULL);
|
|
gpio_request(GPIO_FN_LCDDON, NULL);
|
|
|
|
/* LCD backlight */
|
|
gpio_request(GPIO_PTS3, NULL);
|
|
gpio_direction_output(GPIO_PTS3, 1);
|
|
|
|
/* CEU */
|
|
gpio_request(GPIO_FN_VIO_CLK2, NULL);
|
|
gpio_request(GPIO_FN_VIO_VD2, NULL);
|
|
gpio_request(GPIO_FN_VIO_HD2, NULL);
|
|
gpio_request(GPIO_FN_VIO_FLD, NULL);
|
|
gpio_request(GPIO_FN_VIO_CKO, NULL);
|
|
gpio_request(GPIO_FN_VIO_D15, NULL);
|
|
gpio_request(GPIO_FN_VIO_D14, NULL);
|
|
gpio_request(GPIO_FN_VIO_D13, NULL);
|
|
gpio_request(GPIO_FN_VIO_D12, NULL);
|
|
gpio_request(GPIO_FN_VIO_D11, NULL);
|
|
gpio_request(GPIO_FN_VIO_D10, NULL);
|
|
gpio_request(GPIO_FN_VIO_D9, NULL);
|
|
gpio_request(GPIO_FN_VIO_D8, NULL);
|
|
|
|
gpio_request(GPIO_PTZ7, NULL);
|
|
gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
|
|
gpio_request(GPIO_PTZ6, NULL);
|
|
gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
|
|
gpio_request(GPIO_PTZ5, NULL);
|
|
gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
|
|
gpio_request(GPIO_PTZ4, NULL);
|
|
gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
|
|
|
|
__raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
|
|
|
|
/* FLCTL */
|
|
gpio_request(GPIO_FN_FCE, NULL);
|
|
gpio_request(GPIO_FN_NAF7, NULL);
|
|
gpio_request(GPIO_FN_NAF6, NULL);
|
|
gpio_request(GPIO_FN_NAF5, NULL);
|
|
gpio_request(GPIO_FN_NAF4, NULL);
|
|
gpio_request(GPIO_FN_NAF3, NULL);
|
|
gpio_request(GPIO_FN_NAF2, NULL);
|
|
gpio_request(GPIO_FN_NAF1, NULL);
|
|
gpio_request(GPIO_FN_NAF0, NULL);
|
|
gpio_request(GPIO_FN_FCDE, NULL);
|
|
gpio_request(GPIO_FN_FOE, NULL);
|
|
gpio_request(GPIO_FN_FSC, NULL);
|
|
gpio_request(GPIO_FN_FWE, NULL);
|
|
gpio_request(GPIO_FN_FRB, NULL);
|
|
|
|
__raw_writew(0, PORT_HIZCRC);
|
|
__raw_writew(0xFFFF, PORT_DRVCRA);
|
|
__raw_writew(0xFFFF, PORT_DRVCRB);
|
|
|
|
platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
|
|
|
|
/* SDHI0 - CN3 - SD CARD */
|
|
gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
|
|
|
|
/* SDHI1 - CN7 - MICRO SD CARD */
|
|
gpio_request(GPIO_FN_SDHI1CD, NULL);
|
|
gpio_request(GPIO_FN_SDHI1D3, NULL);
|
|
gpio_request(GPIO_FN_SDHI1D2, NULL);
|
|
gpio_request(GPIO_FN_SDHI1D1, NULL);
|
|
gpio_request(GPIO_FN_SDHI1D0, NULL);
|
|
gpio_request(GPIO_FN_SDHI1CMD, NULL);
|
|
gpio_request(GPIO_FN_SDHI1CLK, NULL);
|
|
|
|
i2c_register_board_info(0, ap325rxa_i2c_devices,
|
|
ARRAY_SIZE(ap325rxa_i2c_devices));
|
|
|
|
return platform_add_devices(ap325rxa_devices,
|
|
ARRAY_SIZE(ap325rxa_devices));
|
|
}
|
|
arch_initcall(ap325rxa_devices_setup);
|
|
|
|
/* Return the board specific boot mode pin configuration */
|
|
static int ap325rxa_mode_pins(void)
|
|
{
|
|
/* MD0=0, MD1=0, MD2=0: Clock Mode 0
|
|
* MD3=0: 16-bit Area0 Bus Width
|
|
* MD5=1: Little Endian
|
|
* TSTMD=1, MD8=1: Test Mode Disabled
|
|
*/
|
|
return MODE_PIN5 | MODE_PIN8;
|
|
}
|
|
|
|
static struct sh_machine_vector mv_ap325rxa __initmv = {
|
|
.mv_name = "AP-325RXA",
|
|
.mv_mode_pins = ap325rxa_mode_pins,
|
|
};
|