42d6e16787
Make functions/structures that the GM20B driver will reuse public. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
66 lines
2.1 KiB
C
66 lines
2.1 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __NVKM_CLK_GK20A_H__
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#define __NVKM_CLK_GK20A_H__
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#define GK20A_CLK_GPC_MDIV 1000
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#define SYS_GPCPLL_CFG_BASE 0x00137000
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/* All frequencies in Khz */
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struct gk20a_clk_pllg_params {
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u32 min_vco, max_vco;
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u32 min_u, max_u;
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u32 min_m, max_m;
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u32 min_n, max_n;
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u32 min_pl, max_pl;
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};
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struct gk20a_pll {
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u32 m;
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u32 n;
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u32 pl;
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};
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struct gk20a_clk {
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struct nvkm_clk base;
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const struct gk20a_clk_pllg_params *params;
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struct gk20a_pll pll;
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u32 parent_rate;
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u32 (*div_to_pl)(u32);
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u32 (*pl_to_div)(u32);
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};
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#define gk20a_clk(p) container_of((p), struct gk20a_clk, base)
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int _gk20a_clk_ctor(struct nvkm_device *, int, const struct nvkm_clk_func *,
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const struct gk20a_clk_pllg_params *, struct gk20a_clk *);
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void gk20a_clk_fini(struct nvkm_clk *);
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int gk20a_clk_read(struct nvkm_clk *, enum nv_clk_src);
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int gk20a_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);
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int gk20a_clk_prog(struct nvkm_clk *);
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void gk20a_clk_tidy(struct nvkm_clk *);
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#endif
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