forked from Minki/linux
6d7e0a3420
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801 lines
23 KiB
C
801 lines
23 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* at24.c - handle most I2C EEPROMs
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*
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* Copyright (C) 2005-2007 David Brownell
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* Copyright (C) 2008 Wolfram Sang, Pengutronix
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*/
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#include <linux/acpi.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/jiffies.h>
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#include <linux/kernel.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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/* Address pointer is 16 bit. */
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#define AT24_FLAG_ADDR16 BIT(7)
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/* sysfs-entry will be read-only. */
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#define AT24_FLAG_READONLY BIT(6)
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/* sysfs-entry will be world-readable. */
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#define AT24_FLAG_IRUGO BIT(5)
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/* Take always 8 addresses (24c00). */
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#define AT24_FLAG_TAKE8ADDR BIT(4)
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/* Factory-programmed serial number. */
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#define AT24_FLAG_SERIAL BIT(3)
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/* Factory-programmed mac address. */
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#define AT24_FLAG_MAC BIT(2)
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/* Does not auto-rollover reads to the next slave address. */
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#define AT24_FLAG_NO_RDROL BIT(1)
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/*
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* I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
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* Differences between different vendor product lines (like Atmel AT24C or
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* MicroChip 24LC, etc) won't much matter for typical read/write access.
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* There are also I2C RAM chips, likewise interchangeable. One example
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* would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
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*
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* However, misconfiguration can lose data. "Set 16-bit memory address"
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* to a part with 8-bit addressing will overwrite data. Writing with too
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* big a page size also loses data. And it's not safe to assume that the
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* conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
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* uses 0x51, for just one example.
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*
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* Accordingly, explicit board-specific configuration data should be used
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* in almost all cases. (One partial exception is an SMBus used to access
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* "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
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*
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* So this driver uses "new style" I2C driver binding, expecting to be
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* told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
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* similar kernel-resident tables; or, configuration data coming from
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* a bootloader.
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*
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* Other than binding model, current differences from "eeprom" driver are
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* that this one handles write access and isn't restricted to 24c02 devices.
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* It also handles larger devices (32 kbit and up) with two-byte addresses,
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* which won't work on pure SMBus systems.
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*/
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struct at24_client {
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struct i2c_client *client;
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struct regmap *regmap;
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};
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struct at24_data {
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/*
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* Lock protects against activities from other Linux tasks,
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* but not from changes by other I2C masters.
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*/
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struct mutex lock;
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unsigned int write_max;
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unsigned int num_addresses;
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unsigned int offset_adj;
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u32 byte_len;
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u16 page_size;
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u8 flags;
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struct nvmem_device *nvmem;
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struct regulator *vcc_reg;
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/*
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* Some chips tie up multiple I2C addresses; dummy devices reserve
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* them for us, and we'll use them with SMBus calls.
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*/
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struct at24_client client[];
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};
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/*
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* This parameter is to help this driver avoid blocking other drivers out
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* of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
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* clock, one 256 byte read takes about 1/43 second which is excessive;
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* but the 1/170 second it takes at 400 kHz may be quite reasonable; and
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* at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
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*
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* This value is forced to be a power of two so that writes align on pages.
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*/
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static unsigned int at24_io_limit = 128;
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module_param_named(io_limit, at24_io_limit, uint, 0);
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MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
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/*
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* Specs often allow 5 msec for a page write, sometimes 20 msec;
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* it's important to recover from write timeouts.
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*/
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static unsigned int at24_write_timeout = 25;
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module_param_named(write_timeout, at24_write_timeout, uint, 0);
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MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
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struct at24_chip_data {
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u32 byte_len;
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u8 flags;
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};
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#define AT24_CHIP_DATA(_name, _len, _flags) \
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static const struct at24_chip_data _name = { \
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.byte_len = _len, .flags = _flags, \
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}
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/* needs 8 addresses as A0-A2 are ignored */
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AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
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/* old variants can't be handled with this generic entry! */
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AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
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AT24_CHIP_DATA(at24_data_24cs01, 16,
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AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
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AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
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AT24_CHIP_DATA(at24_data_24cs02, 16,
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AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
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AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
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AT24_FLAG_MAC | AT24_FLAG_READONLY);
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AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
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AT24_FLAG_MAC | AT24_FLAG_READONLY);
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/* spd is a 24c02 in memory DIMMs */
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AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
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AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
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AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
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AT24_CHIP_DATA(at24_data_24cs04, 16,
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AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
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/* 24rf08 quirk is handled at i2c-core */
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AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
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AT24_CHIP_DATA(at24_data_24cs08, 16,
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AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
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AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
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AT24_CHIP_DATA(at24_data_24cs16, 16,
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AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
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AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
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AT24_CHIP_DATA(at24_data_24cs32, 16,
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AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
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AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
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AT24_CHIP_DATA(at24_data_24cs64, 16,
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AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
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AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
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AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
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AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
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AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
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AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
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/* identical to 24c08 ? */
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AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
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static const struct i2c_device_id at24_ids[] = {
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{ "24c00", (kernel_ulong_t)&at24_data_24c00 },
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{ "24c01", (kernel_ulong_t)&at24_data_24c01 },
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{ "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
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{ "24c02", (kernel_ulong_t)&at24_data_24c02 },
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{ "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
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{ "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
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{ "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
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{ "spd", (kernel_ulong_t)&at24_data_spd },
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{ "24c04", (kernel_ulong_t)&at24_data_24c04 },
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{ "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
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{ "24c08", (kernel_ulong_t)&at24_data_24c08 },
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{ "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
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{ "24c16", (kernel_ulong_t)&at24_data_24c16 },
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{ "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
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{ "24c32", (kernel_ulong_t)&at24_data_24c32 },
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{ "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
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{ "24c64", (kernel_ulong_t)&at24_data_24c64 },
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{ "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
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{ "24c128", (kernel_ulong_t)&at24_data_24c128 },
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{ "24c256", (kernel_ulong_t)&at24_data_24c256 },
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{ "24c512", (kernel_ulong_t)&at24_data_24c512 },
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{ "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
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{ "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
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{ "at24", 0 },
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{ /* END OF LIST */ }
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};
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MODULE_DEVICE_TABLE(i2c, at24_ids);
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static const struct of_device_id at24_of_match[] = {
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{ .compatible = "atmel,24c00", .data = &at24_data_24c00 },
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{ .compatible = "atmel,24c01", .data = &at24_data_24c01 },
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{ .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
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{ .compatible = "atmel,24c02", .data = &at24_data_24c02 },
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{ .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
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{ .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
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{ .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
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{ .compatible = "atmel,spd", .data = &at24_data_spd },
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{ .compatible = "atmel,24c04", .data = &at24_data_24c04 },
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{ .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
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{ .compatible = "atmel,24c08", .data = &at24_data_24c08 },
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{ .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
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{ .compatible = "atmel,24c16", .data = &at24_data_24c16 },
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{ .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
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{ .compatible = "atmel,24c32", .data = &at24_data_24c32 },
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{ .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
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{ .compatible = "atmel,24c64", .data = &at24_data_24c64 },
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{ .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
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{ .compatible = "atmel,24c128", .data = &at24_data_24c128 },
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{ .compatible = "atmel,24c256", .data = &at24_data_24c256 },
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{ .compatible = "atmel,24c512", .data = &at24_data_24c512 },
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{ .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
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{ .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
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{ /* END OF LIST */ },
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};
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MODULE_DEVICE_TABLE(of, at24_of_match);
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static const struct acpi_device_id at24_acpi_ids[] = {
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{ "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
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{ "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
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{ /* END OF LIST */ }
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};
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MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
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/*
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* This routine supports chips which consume multiple I2C addresses. It
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* computes the addressing information to be used for a given r/w request.
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* Assumes that sanity checks for offset happened at sysfs-layer.
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*
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* Slave address and byte offset derive from the offset. Always
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* set the byte address; on a multi-master board, another master
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* may have changed the chip's "current" address pointer.
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*/
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static struct at24_client *at24_translate_offset(struct at24_data *at24,
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unsigned int *offset)
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{
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unsigned int i;
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if (at24->flags & AT24_FLAG_ADDR16) {
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i = *offset >> 16;
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*offset &= 0xffff;
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} else {
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i = *offset >> 8;
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*offset &= 0xff;
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}
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return &at24->client[i];
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}
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static struct device *at24_base_client_dev(struct at24_data *at24)
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{
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return &at24->client[0].client->dev;
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}
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static size_t at24_adjust_read_count(struct at24_data *at24,
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unsigned int offset, size_t count)
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{
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unsigned int bits;
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size_t remainder;
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/*
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* In case of multi-address chips that don't rollover reads to
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* the next slave address: truncate the count to the slave boundary,
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* so that the read never straddles slaves.
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*/
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if (at24->flags & AT24_FLAG_NO_RDROL) {
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bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
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remainder = BIT(bits) - offset;
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if (count > remainder)
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count = remainder;
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}
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if (count > at24_io_limit)
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count = at24_io_limit;
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return count;
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}
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static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
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unsigned int offset, size_t count)
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{
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unsigned long timeout, read_time;
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struct at24_client *at24_client;
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struct i2c_client *client;
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struct regmap *regmap;
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int ret;
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at24_client = at24_translate_offset(at24, &offset);
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regmap = at24_client->regmap;
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client = at24_client->client;
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count = at24_adjust_read_count(at24, offset, count);
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/* adjust offset for mac and serial read ops */
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offset += at24->offset_adj;
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timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
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do {
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/*
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* The timestamp shall be taken before the actual operation
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* to avoid a premature timeout in case of high CPU load.
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*/
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read_time = jiffies;
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ret = regmap_bulk_read(regmap, offset, buf, count);
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dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
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count, offset, ret, jiffies);
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if (!ret)
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return count;
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usleep_range(1000, 1500);
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} while (time_before(read_time, timeout));
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return -ETIMEDOUT;
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}
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/*
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* Note that if the hardware write-protect pin is pulled high, the whole
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* chip is normally write protected. But there are plenty of product
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* variants here, including OTP fuses and partial chip protect.
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*
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* We only use page mode writes; the alternative is sloooow. These routines
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* write at most one page.
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*/
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static size_t at24_adjust_write_count(struct at24_data *at24,
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unsigned int offset, size_t count)
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{
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unsigned int next_page;
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/* write_max is at most a page */
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if (count > at24->write_max)
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count = at24->write_max;
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/* Never roll over backwards, to the start of this page */
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next_page = roundup(offset + 1, at24->page_size);
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if (offset + count > next_page)
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count = next_page - offset;
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return count;
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}
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static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
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unsigned int offset, size_t count)
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{
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unsigned long timeout, write_time;
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struct at24_client *at24_client;
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struct i2c_client *client;
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struct regmap *regmap;
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int ret;
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at24_client = at24_translate_offset(at24, &offset);
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regmap = at24_client->regmap;
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client = at24_client->client;
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count = at24_adjust_write_count(at24, offset, count);
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timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
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do {
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/*
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* The timestamp shall be taken before the actual operation
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* to avoid a premature timeout in case of high CPU load.
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*/
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write_time = jiffies;
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ret = regmap_bulk_write(regmap, offset, buf, count);
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dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n",
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count, offset, ret, jiffies);
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if (!ret)
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return count;
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usleep_range(1000, 1500);
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} while (time_before(write_time, timeout));
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return -ETIMEDOUT;
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}
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static int at24_read(void *priv, unsigned int off, void *val, size_t count)
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{
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struct at24_data *at24;
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struct device *dev;
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char *buf = val;
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int ret;
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at24 = priv;
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dev = at24_base_client_dev(at24);
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if (unlikely(!count))
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return count;
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if (off + count > at24->byte_len)
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return -EINVAL;
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ret = pm_runtime_get_sync(dev);
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if (ret < 0) {
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pm_runtime_put_noidle(dev);
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return ret;
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}
|
|
|
|
/*
|
|
* Read data from chip, protecting against concurrent updates
|
|
* from this host, but not from other I2C masters.
|
|
*/
|
|
mutex_lock(&at24->lock);
|
|
|
|
while (count) {
|
|
ret = at24_regmap_read(at24, buf, off, count);
|
|
if (ret < 0) {
|
|
mutex_unlock(&at24->lock);
|
|
pm_runtime_put(dev);
|
|
return ret;
|
|
}
|
|
buf += ret;
|
|
off += ret;
|
|
count -= ret;
|
|
}
|
|
|
|
mutex_unlock(&at24->lock);
|
|
|
|
pm_runtime_put(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int at24_write(void *priv, unsigned int off, void *val, size_t count)
|
|
{
|
|
struct at24_data *at24;
|
|
struct device *dev;
|
|
char *buf = val;
|
|
int ret;
|
|
|
|
at24 = priv;
|
|
dev = at24_base_client_dev(at24);
|
|
|
|
if (unlikely(!count))
|
|
return -EINVAL;
|
|
|
|
if (off + count > at24->byte_len)
|
|
return -EINVAL;
|
|
|
|
ret = pm_runtime_get_sync(dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(dev);
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Write data to chip, protecting against concurrent updates
|
|
* from this host, but not from other I2C masters.
|
|
*/
|
|
mutex_lock(&at24->lock);
|
|
|
|
while (count) {
|
|
ret = at24_regmap_write(at24, buf, off, count);
|
|
if (ret < 0) {
|
|
mutex_unlock(&at24->lock);
|
|
pm_runtime_put(dev);
|
|
return ret;
|
|
}
|
|
buf += ret;
|
|
off += ret;
|
|
count -= ret;
|
|
}
|
|
|
|
mutex_unlock(&at24->lock);
|
|
|
|
pm_runtime_put(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct at24_chip_data *at24_get_chip_data(struct device *dev)
|
|
{
|
|
struct device_node *of_node = dev->of_node;
|
|
const struct at24_chip_data *cdata;
|
|
const struct i2c_device_id *id;
|
|
|
|
id = i2c_match_id(at24_ids, to_i2c_client(dev));
|
|
|
|
/*
|
|
* The I2C core allows OF nodes compatibles to match against the
|
|
* I2C device ID table as a fallback, so check not only if an OF
|
|
* node is present but also if it matches an OF device ID entry.
|
|
*/
|
|
if (of_node && of_match_device(at24_of_match, dev))
|
|
cdata = of_device_get_match_data(dev);
|
|
else if (id)
|
|
cdata = (void *)id->driver_data;
|
|
else
|
|
cdata = acpi_device_get_match_data(dev);
|
|
|
|
if (!cdata)
|
|
return ERR_PTR(-ENODEV);
|
|
|
|
return cdata;
|
|
}
|
|
|
|
static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
|
|
struct regmap_config *regmap_config)
|
|
{
|
|
struct i2c_client *base_client, *dummy_client;
|
|
struct regmap *regmap;
|
|
struct device *dev;
|
|
|
|
base_client = at24->client[0].client;
|
|
dev = &base_client->dev;
|
|
|
|
dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter,
|
|
base_client->addr + index);
|
|
if (IS_ERR(dummy_client))
|
|
return PTR_ERR(dummy_client);
|
|
|
|
regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
|
|
if (IS_ERR(regmap))
|
|
return PTR_ERR(regmap);
|
|
|
|
at24->client[index].client = dummy_client;
|
|
at24->client[index].regmap = regmap;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
|
|
{
|
|
if (flags & AT24_FLAG_MAC) {
|
|
/* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
|
|
return 0xa0 - byte_len;
|
|
} else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
|
|
/*
|
|
* For 16 bit address pointers, the word address must contain
|
|
* a '10' sequence in bits 11 and 10 regardless of the
|
|
* intended position of the address pointer.
|
|
*/
|
|
return 0x0800;
|
|
} else if (flags & AT24_FLAG_SERIAL) {
|
|
/*
|
|
* Otherwise the word address must begin with a '10' sequence,
|
|
* regardless of the intended address.
|
|
*/
|
|
return 0x0080;
|
|
} else {
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
static int at24_probe(struct i2c_client *client)
|
|
{
|
|
struct regmap_config regmap_config = { };
|
|
struct nvmem_config nvmem_config = { };
|
|
u32 byte_len, page_size, flags, addrw;
|
|
const struct at24_chip_data *cdata;
|
|
struct device *dev = &client->dev;
|
|
bool i2c_fn_i2c, i2c_fn_block;
|
|
unsigned int i, num_addresses;
|
|
struct at24_data *at24;
|
|
struct regmap *regmap;
|
|
bool writable;
|
|
u8 test_byte;
|
|
int err;
|
|
|
|
i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
|
|
i2c_fn_block = i2c_check_functionality(client->adapter,
|
|
I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
|
|
|
|
cdata = at24_get_chip_data(dev);
|
|
if (IS_ERR(cdata))
|
|
return PTR_ERR(cdata);
|
|
|
|
err = device_property_read_u32(dev, "pagesize", &page_size);
|
|
if (err)
|
|
/*
|
|
* This is slow, but we can't know all eeproms, so we better
|
|
* play safe. Specifying custom eeprom-types via device tree
|
|
* or properties is recommended anyhow.
|
|
*/
|
|
page_size = 1;
|
|
|
|
flags = cdata->flags;
|
|
if (device_property_present(dev, "read-only"))
|
|
flags |= AT24_FLAG_READONLY;
|
|
if (device_property_present(dev, "no-read-rollover"))
|
|
flags |= AT24_FLAG_NO_RDROL;
|
|
|
|
err = device_property_read_u32(dev, "address-width", &addrw);
|
|
if (!err) {
|
|
switch (addrw) {
|
|
case 8:
|
|
if (flags & AT24_FLAG_ADDR16)
|
|
dev_warn(dev,
|
|
"Override address width to be 8, while default is 16\n");
|
|
flags &= ~AT24_FLAG_ADDR16;
|
|
break;
|
|
case 16:
|
|
flags |= AT24_FLAG_ADDR16;
|
|
break;
|
|
default:
|
|
dev_warn(dev, "Bad \"address-width\" property: %u\n",
|
|
addrw);
|
|
}
|
|
}
|
|
|
|
err = device_property_read_u32(dev, "size", &byte_len);
|
|
if (err)
|
|
byte_len = cdata->byte_len;
|
|
|
|
if (!i2c_fn_i2c && !i2c_fn_block)
|
|
page_size = 1;
|
|
|
|
if (!page_size) {
|
|
dev_err(dev, "page_size must not be 0!\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (!is_power_of_2(page_size))
|
|
dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
|
|
|
|
err = device_property_read_u32(dev, "num-addresses", &num_addresses);
|
|
if (err) {
|
|
if (flags & AT24_FLAG_TAKE8ADDR)
|
|
num_addresses = 8;
|
|
else
|
|
num_addresses = DIV_ROUND_UP(byte_len,
|
|
(flags & AT24_FLAG_ADDR16) ? 65536 : 256);
|
|
}
|
|
|
|
if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
|
|
dev_err(dev,
|
|
"invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
|
|
return -EINVAL;
|
|
}
|
|
|
|
regmap_config.val_bits = 8;
|
|
regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
|
|
regmap_config.disable_locking = true;
|
|
|
|
regmap = devm_regmap_init_i2c(client, ®map_config);
|
|
if (IS_ERR(regmap))
|
|
return PTR_ERR(regmap);
|
|
|
|
at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses),
|
|
GFP_KERNEL);
|
|
if (!at24)
|
|
return -ENOMEM;
|
|
|
|
mutex_init(&at24->lock);
|
|
at24->byte_len = byte_len;
|
|
at24->page_size = page_size;
|
|
at24->flags = flags;
|
|
at24->num_addresses = num_addresses;
|
|
at24->offset_adj = at24_get_offset_adj(flags, byte_len);
|
|
at24->client[0].client = client;
|
|
at24->client[0].regmap = regmap;
|
|
|
|
at24->vcc_reg = devm_regulator_get(dev, "vcc");
|
|
if (IS_ERR(at24->vcc_reg))
|
|
return PTR_ERR(at24->vcc_reg);
|
|
|
|
writable = !(flags & AT24_FLAG_READONLY);
|
|
if (writable) {
|
|
at24->write_max = min_t(unsigned int,
|
|
page_size, at24_io_limit);
|
|
if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
|
|
at24->write_max = I2C_SMBUS_BLOCK_MAX;
|
|
}
|
|
|
|
/* use dummy devices for multiple-address chips */
|
|
for (i = 1; i < num_addresses; i++) {
|
|
err = at24_make_dummy_client(at24, i, ®map_config);
|
|
if (err)
|
|
return err;
|
|
}
|
|
|
|
nvmem_config.name = dev_name(dev);
|
|
nvmem_config.dev = dev;
|
|
nvmem_config.read_only = !writable;
|
|
nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
|
|
nvmem_config.owner = THIS_MODULE;
|
|
nvmem_config.compat = true;
|
|
nvmem_config.base_dev = dev;
|
|
nvmem_config.reg_read = at24_read;
|
|
nvmem_config.reg_write = at24_write;
|
|
nvmem_config.priv = at24;
|
|
nvmem_config.stride = 1;
|
|
nvmem_config.word_size = 1;
|
|
nvmem_config.size = byte_len;
|
|
|
|
at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
|
|
if (IS_ERR(at24->nvmem))
|
|
return PTR_ERR(at24->nvmem);
|
|
|
|
i2c_set_clientdata(client, at24);
|
|
|
|
err = regulator_enable(at24->vcc_reg);
|
|
if (err) {
|
|
dev_err(dev, "Failed to enable vcc regulator\n");
|
|
return err;
|
|
}
|
|
|
|
/* enable runtime pm */
|
|
pm_runtime_set_active(dev);
|
|
pm_runtime_enable(dev);
|
|
|
|
/*
|
|
* Perform a one-byte test read to verify that the
|
|
* chip is functional.
|
|
*/
|
|
err = at24_read(at24, 0, &test_byte, 1);
|
|
if (err) {
|
|
pm_runtime_disable(dev);
|
|
regulator_disable(at24->vcc_reg);
|
|
return -ENODEV;
|
|
}
|
|
|
|
pm_runtime_idle(dev);
|
|
|
|
if (writable)
|
|
dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
|
|
byte_len, client->name, at24->write_max);
|
|
else
|
|
dev_info(dev, "%u byte %s EEPROM, read-only\n",
|
|
byte_len, client->name);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int at24_remove(struct i2c_client *client)
|
|
{
|
|
struct at24_data *at24 = i2c_get_clientdata(client);
|
|
|
|
pm_runtime_disable(&client->dev);
|
|
if (!pm_runtime_status_suspended(&client->dev))
|
|
regulator_disable(at24->vcc_reg);
|
|
pm_runtime_set_suspended(&client->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __maybe_unused at24_suspend(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct at24_data *at24 = i2c_get_clientdata(client);
|
|
|
|
return regulator_disable(at24->vcc_reg);
|
|
}
|
|
|
|
static int __maybe_unused at24_resume(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct at24_data *at24 = i2c_get_clientdata(client);
|
|
|
|
return regulator_enable(at24->vcc_reg);
|
|
}
|
|
|
|
static const struct dev_pm_ops at24_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
|
|
pm_runtime_force_resume)
|
|
SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
|
|
};
|
|
|
|
static struct i2c_driver at24_driver = {
|
|
.driver = {
|
|
.name = "at24",
|
|
.pm = &at24_pm_ops,
|
|
.of_match_table = at24_of_match,
|
|
.acpi_match_table = ACPI_PTR(at24_acpi_ids),
|
|
},
|
|
.probe_new = at24_probe,
|
|
.remove = at24_remove,
|
|
.id_table = at24_ids,
|
|
};
|
|
|
|
static int __init at24_init(void)
|
|
{
|
|
if (!at24_io_limit) {
|
|
pr_err("at24: at24_io_limit must not be 0!\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
at24_io_limit = rounddown_pow_of_two(at24_io_limit);
|
|
return i2c_add_driver(&at24_driver);
|
|
}
|
|
module_init(at24_init);
|
|
|
|
static void __exit at24_exit(void)
|
|
{
|
|
i2c_del_driver(&at24_driver);
|
|
}
|
|
module_exit(at24_exit);
|
|
|
|
MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
|
|
MODULE_AUTHOR("David Brownell and Wolfram Sang");
|
|
MODULE_LICENSE("GPL");
|