forked from Minki/linux
9d5a634946
Based on 1 normalized pattern(s): this program is free software you can distribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin st fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 33 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531081038.563233189@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
170 lines
3.9 KiB
C
170 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* IEEE754 floating point arithmetic
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* single precision
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*/
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/*
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* MIPS floating point support
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* Copyright (C) 1994-2000 Algorithmics Ltd.
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*/
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#include "ieee754sp.h"
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union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
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{
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int s;
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COMPXSP;
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COMPYSP;
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EXPLODEXSP;
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EXPLODEYSP;
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ieee754_clearcx();
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FLUSHXSP;
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FLUSHYSP;
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switch (CLPAIR(xc, yc)) {
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
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return ieee754sp_nanxcpt(y);
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
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return ieee754sp_nanxcpt(x);
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
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return y;
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
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case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
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return x;
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/*
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* Infinity handling
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*/
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
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if (xs != ys)
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return x;
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ieee754_setcx(IEEE754_INVALID_OPERATION);
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return ieee754sp_indef();
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
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return ieee754sp_inf(ys ^ 1);
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
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return x;
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/*
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* Zero handling
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*/
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
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if (xs != ys)
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return x;
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else
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return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
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return x;
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
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case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
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/* quick fix up */
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SPSIGN(y) ^= 1;
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return y;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
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SPDNORMX;
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/* fall through */
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
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SPDNORMY;
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break;
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case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
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SPDNORMX;
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break;
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case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
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break;
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}
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/* flip sign of y and handle as add */
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ys ^= 1;
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assert(xm & SP_HIDDEN_BIT);
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assert(ym & SP_HIDDEN_BIT);
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/* provide guard,round and stick bit space */
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xm <<= 3;
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ym <<= 3;
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if (xe > ye) {
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/*
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* have to shift y fraction right to align
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*/
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s = xe - ye;
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ym = XSPSRS(ym, s);
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ye += s;
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} else if (ye > xe) {
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/*
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* have to shift x fraction right to align
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*/
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s = ye - xe;
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xm = XSPSRS(xm, s);
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xe += s;
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}
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assert(xe == ye);
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assert(xe <= SP_EMAX);
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if (xs == ys) {
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/* generate 28 bit result of adding two 27 bit numbers
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*/
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xm = xm + ym;
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if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
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SPXSRSX1(); /* shift preserving sticky */
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}
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} else {
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if (xm >= ym) {
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xm = xm - ym;
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} else {
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xm = ym - xm;
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xs = ys;
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}
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if (xm == 0) {
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if (ieee754_csr.rm == FPU_CSR_RD)
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return ieee754sp_zero(1); /* round negative inf. => sign = -1 */
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else
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return ieee754sp_zero(0); /* other round modes => sign = 1 */
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}
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/* normalize to rounding precision
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*/
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while ((xm >> (SP_FBITS + 3)) == 0) {
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xm <<= 1;
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xe--;
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}
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}
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return ieee754sp_format(xs, xe, xm);
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}
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