forked from Minki/linux
eadfb501a5
Currently on a guest exception the guest's k0 register is saved to the scratch temp register and the guest k1 saved to the exception base address + 0x3000 using k0 to extract the Exception Base field of the EBase register and as the base operand to the store. Both are then copied into the VCPU structure after the other general purpose registers have been saved there. This bouncing to exception base + 0x3000 is not actually necessary as the VCPU pointer can be determined and written through just as easily with only a single spare register. The VCPU pointer is already needed in k1 for saving the other GP registers, so lets save the guest k0 register straight into the VCPU structure through k1, first saving k1 into the scratch temp register instead of k0. This could potentially pave the way for having a single exception base area for use by all guests. The ehb after saving the k register to the scratch temp register is also delayed until just before it needs to be read back. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim KrÄmář <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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| .. | ||
| 00README.txt | ||
| callback.c | ||
| commpage.c | ||
| commpage.h | ||
| dyntrans.c | ||
| emulate.c | ||
| entry.c | ||
| fpu.S | ||
| interrupt.c | ||
| interrupt.h | ||
| Kconfig | ||
| Makefile | ||
| mips.c | ||
| mmu.c | ||
| msa.S | ||
| stats.c | ||
| tlb.c | ||
| trace.h | ||
| trap_emul.c | ||