forked from Minki/linux
ef4ed97d6b
Conflicts: arch/sh/kernel/setup.c
475 lines
12 KiB
C
475 lines
12 KiB
C
/*
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* arch/sh/kernel/setup.c
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*
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* This file handles the architecture-dependent parts of initialization
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*
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* Copyright (C) 1999 Niibe Yutaka
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* Copyright (C) 2002 - 2010 Paul Mundt
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*/
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#include <linux/screen_info.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/initrd.h>
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#include <linux/bootmem.h>
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#include <linux/console.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/utsname.h>
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#include <linux/nodemask.h>
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#include <linux/cpu.h>
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#include <linux/pfn.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/kexec.h>
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#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/err.h>
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#include <linux/debugfs.h>
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#include <linux/crash_dump.h>
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#include <linux/mmzone.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/lmb.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/elf.h>
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#include <asm/sections.h>
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#include <asm/irq.h>
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#include <asm/setup.h>
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#include <asm/clock.h>
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#include <asm/smp.h>
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#include <asm/mmu_context.h>
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#include <asm/mmzone.h>
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/*
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* Initialize loops_per_jiffy as 10000000 (1000MIPS).
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* This value will be used at the very early stage of serial setup.
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* The bigger value means no problem.
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*/
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struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
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[0] = {
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.type = CPU_SH_NONE,
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.family = CPU_FAMILY_UNKNOWN,
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.loops_per_jiffy = 10000000,
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},
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};
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EXPORT_SYMBOL(cpu_data);
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/*
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* The machine vector. First entry in .machvec.init, or clobbered by
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* sh_mv= on the command line, prior to .machvec.init teardown.
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*/
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struct sh_machine_vector sh_mv = { .mv_name = "generic", };
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EXPORT_SYMBOL(sh_mv);
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#ifdef CONFIG_VT
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struct screen_info screen_info;
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#endif
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extern int root_mountflags;
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#define RAMDISK_IMAGE_START_MASK 0x07FF
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#define RAMDISK_PROMPT_FLAG 0x8000
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#define RAMDISK_LOAD_FLAG 0x4000
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static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, };
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static struct resource code_resource = {
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.name = "Kernel code",
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.flags = IORESOURCE_BUSY | IORESOURCE_MEM,
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};
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static struct resource data_resource = {
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.name = "Kernel data",
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.flags = IORESOURCE_BUSY | IORESOURCE_MEM,
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};
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static struct resource bss_resource = {
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.name = "Kernel bss",
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.flags = IORESOURCE_BUSY | IORESOURCE_MEM,
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};
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unsigned long memory_start;
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EXPORT_SYMBOL(memory_start);
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unsigned long memory_end = 0;
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EXPORT_SYMBOL(memory_end);
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unsigned long memory_limit = 0;
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static struct resource mem_resources[MAX_NUMNODES];
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int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
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static int __init early_parse_mem(char *p)
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{
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if (!p)
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return 1;
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memory_limit = PAGE_ALIGN(memparse(p, &p));
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pr_notice("Memory limited to %ldMB\n", memory_limit >> 20);
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return 0;
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}
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early_param("mem", early_parse_mem);
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void __init check_for_initrd(void)
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{
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#ifdef CONFIG_BLK_DEV_INITRD
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unsigned long start, end;
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/*
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* Check for the rare cases where boot loaders adhere to the boot
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* ABI.
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*/
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if (!LOADER_TYPE || !INITRD_START || !INITRD_SIZE)
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goto disable;
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start = INITRD_START + __MEMORY_START;
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end = start + INITRD_SIZE;
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if (unlikely(end <= start))
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goto disable;
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if (unlikely(start & ~PAGE_MASK)) {
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pr_err("initrd must be page aligned\n");
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goto disable;
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}
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if (unlikely(start < PAGE_OFFSET)) {
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pr_err("initrd start < PAGE_OFFSET\n");
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goto disable;
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}
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if (unlikely(end > lmb_end_of_DRAM())) {
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pr_err("initrd extends beyond end of memory "
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"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
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end, (unsigned long)lmb_end_of_DRAM());
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goto disable;
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}
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/*
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* If we got this far inspite of the boot loader's best efforts
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* to the contrary, assume we actually have a valid initrd and
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* fix up the root dev.
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*/
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ROOT_DEV = Root_RAM0;
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/*
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* Address sanitization
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*/
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initrd_start = (unsigned long)__va(__pa(start));
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initrd_end = initrd_start + INITRD_SIZE;
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lmb_reserve(__pa(initrd_start), INITRD_SIZE);
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return;
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disable:
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pr_info("initrd disabled\n");
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initrd_start = initrd_end = 0;
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#endif
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}
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void __cpuinit calibrate_delay(void)
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{
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struct clk *clk = clk_get(NULL, "cpu_clk");
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if (IS_ERR(clk))
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panic("Need a sane CPU clock definition!");
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loops_per_jiffy = (clk_get_rate(clk) >> 1) / HZ;
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printk(KERN_INFO "Calibrating delay loop (skipped)... "
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"%lu.%02lu BogoMIPS PRESET (lpj=%lu)\n",
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loops_per_jiffy/(500000/HZ),
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(loops_per_jiffy/(5000/HZ)) % 100,
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loops_per_jiffy);
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}
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void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
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unsigned long end_pfn)
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{
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struct resource *res = &mem_resources[nid];
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unsigned long start, end;
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WARN_ON(res->name); /* max one active range per node for now */
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start = start_pfn << PAGE_SHIFT;
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end = end_pfn << PAGE_SHIFT;
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res->name = "System RAM";
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res->start = start;
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res->end = end - 1;
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res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
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if (request_resource(&iomem_resource, res)) {
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pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
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start_pfn, end_pfn);
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return;
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}
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/*
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* We don't know which RAM region contains kernel data,
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* so we try it repeatedly and let the resource manager
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* test it.
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*/
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request_resource(res, &code_resource);
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request_resource(res, &data_resource);
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request_resource(res, &bss_resource);
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/*
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* Also make sure that there is a PMB mapping that covers this
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* range before we attempt to activate it, to avoid reset by MMU.
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* We can hit this path with NUMA or memory hot-add.
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*/
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pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
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PAGE_KERNEL);
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add_active_range(nid, start_pfn, end_pfn);
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}
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void __init __weak plat_early_device_setup(void)
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{
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}
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void __init setup_arch(char **cmdline_p)
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{
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enable_mmu();
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ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
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printk(KERN_NOTICE "Boot params:\n"
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"... MOUNT_ROOT_RDONLY - %08lx\n"
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"... RAMDISK_FLAGS - %08lx\n"
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"... ORIG_ROOT_DEV - %08lx\n"
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"... LOADER_TYPE - %08lx\n"
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"... INITRD_START - %08lx\n"
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"... INITRD_SIZE - %08lx\n",
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MOUNT_ROOT_RDONLY, RAMDISK_FLAGS,
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ORIG_ROOT_DEV, LOADER_TYPE,
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INITRD_START, INITRD_SIZE);
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#ifdef CONFIG_BLK_DEV_RAM
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rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
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rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
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rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
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#endif
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if (!MOUNT_ROOT_RDONLY)
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root_mountflags &= ~MS_RDONLY;
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init_mm.start_code = (unsigned long) _text;
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init_mm.end_code = (unsigned long) _etext;
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init_mm.end_data = (unsigned long) _edata;
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init_mm.brk = (unsigned long) _end;
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code_resource.start = virt_to_phys(_text);
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code_resource.end = virt_to_phys(_etext)-1;
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data_resource.start = virt_to_phys(_etext);
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data_resource.end = virt_to_phys(_edata)-1;
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bss_resource.start = virt_to_phys(__bss_start);
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bss_resource.end = virt_to_phys(_ebss)-1;
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#ifdef CONFIG_CMDLINE_OVERWRITE
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strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
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#else
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strlcpy(command_line, COMMAND_LINE, sizeof(command_line));
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#ifdef CONFIG_CMDLINE_EXTEND
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strlcat(command_line, " ", sizeof(command_line));
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strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
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#endif
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#endif
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/* Save unparsed command line copy for /proc/cmdline */
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memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
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*cmdline_p = command_line;
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parse_early_param();
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plat_early_device_setup();
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sh_mv_setup();
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/* Let earlyprintk output early console messages */
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early_platform_driver_probe("earlyprintk", 1, 1);
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paging_init();
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#endif
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/* Perform the machine specific initialisation */
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if (likely(sh_mv.mv_setup))
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sh_mv.mv_setup(cmdline_p);
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plat_smp_setup();
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}
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/* processor boot mode configuration */
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int generic_mode_pins(void)
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{
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pr_warning("generic_mode_pins(): missing mode pin configuration\n");
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return 0;
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}
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int test_mode_pin(int pin)
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{
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return sh_mv.mv_mode_pins() & pin;
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}
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static const char *cpu_name[] = {
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[CPU_SH7201] = "SH7201",
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[CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",
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[CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
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[CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
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[CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
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[CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
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[CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720",
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[CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729",
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[CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S",
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[CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751",
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[CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760",
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[CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
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[CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770",
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[CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781",
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[CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
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[CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757",
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[CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
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[CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
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[CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
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[CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724",
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[CPU_SH_NONE] = "Unknown"
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};
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const char *get_cpu_subtype(struct sh_cpuinfo *c)
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{
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return cpu_name[c->type];
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}
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EXPORT_SYMBOL(get_cpu_subtype);
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#ifdef CONFIG_PROC_FS
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/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
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static const char *cpu_flags[] = {
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"none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
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"ptea", "llsc", "l2", "op32", "pteaex", NULL
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};
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static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
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{
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unsigned long i;
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seq_printf(m, "cpu flags\t:");
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if (!c->flags) {
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seq_printf(m, " %s\n", cpu_flags[0]);
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return;
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}
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for (i = 0; cpu_flags[i]; i++)
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if ((c->flags & (1 << i)))
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seq_printf(m, " %s", cpu_flags[i+1]);
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seq_printf(m, "\n");
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}
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static void show_cacheinfo(struct seq_file *m, const char *type,
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struct cache_info info)
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{
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unsigned int cache_size;
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cache_size = info.ways * info.sets * info.linesz;
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seq_printf(m, "%s size\t: %2dKiB (%d-way)\n",
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type, cache_size >> 10, info.ways);
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}
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/*
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* Get CPU information for use by the procfs.
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*/
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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struct sh_cpuinfo *c = v;
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unsigned int cpu = c - cpu_data;
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if (!cpu_online(cpu))
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return 0;
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if (cpu == 0)
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seq_printf(m, "machine\t\t: %s\n", get_system_type());
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else
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seq_printf(m, "\n");
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seq_printf(m, "processor\t: %d\n", cpu);
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seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
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seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
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if (c->cut_major == -1)
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seq_printf(m, "cut\t\t: unknown\n");
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else if (c->cut_minor == -1)
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seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
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else
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seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
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show_cpuflags(m, c);
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seq_printf(m, "cache type\t: ");
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/*
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* Check for what type of cache we have, we support both the
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* unified cache on the SH-2 and SH-3, as well as the harvard
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* style cache on the SH-4.
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*/
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if (c->icache.flags & SH_CACHE_COMBINED) {
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seq_printf(m, "unified\n");
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show_cacheinfo(m, "cache", c->icache);
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} else {
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seq_printf(m, "split (harvard)\n");
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show_cacheinfo(m, "icache", c->icache);
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show_cacheinfo(m, "dcache", c->dcache);
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}
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/* Optional secondary cache */
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if (c->flags & CPU_HAS_L2_CACHE)
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show_cacheinfo(m, "scache", c->scache);
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seq_printf(m, "bogomips\t: %lu.%02lu\n",
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c->loops_per_jiffy/(500000/HZ),
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(c->loops_per_jiffy/(5000/HZ)) % 100);
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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return *pos < NR_CPUS ? cpu_data + *pos : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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#endif /* CONFIG_PROC_FS */
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struct dentry *sh_debugfs_root;
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static int __init sh_debugfs_init(void)
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{
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sh_debugfs_root = debugfs_create_dir("sh", NULL);
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if (!sh_debugfs_root)
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return -ENOMEM;
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if (IS_ERR(sh_debugfs_root))
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return PTR_ERR(sh_debugfs_root);
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return 0;
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}
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arch_initcall(sh_debugfs_init);
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