forked from Minki/linux
4e88d4c083
The USB HCD core driver parses the device-tree node for "phys" and "usb-phys" properties. It also manages the power state of these PHYs automatically. However, drivers may opt-out of this behavior by setting "phy" or "usb_phy" in struct usb_hcd to a non-null value. An example where this is required is the "Qualcomm USB2 controller", implemented by the chipidea driver. The hardware requires that the PHY is only powered on after the "reset completed" event from the controller is received. A follow-up patch will allow the USB HCD core driver to manage more than one PHY. Add a new "skip_phy_initialization" bitflag to struct usb_hcd so drivers can opt-out of any PHY management provided by the USB HCD core driver. This also updates the existing drivers so they use the new flag if they want to opt out of the PHY management provided by the USB HCD core driver. This means that for these drivers the new "multiple PHY" handling (which will be added in a follow-up patch) will be disabled as well. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Peter Chen <peter.chen@nxp.com> Tested-by: Neil Armstrong <narmstrong@baylibre.con> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
273 lines
6.0 KiB
C
273 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* host.c - ChipIdea USB host controller driver
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*
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* Copyright (c) 2012 Intel Corporation
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*
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* Author: Alexander Shishkin
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/usb.h>
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#include <linux/usb/hcd.h>
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#include <linux/usb/chipidea.h>
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#include <linux/regulator/consumer.h>
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#include "../host/ehci.h"
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#include "ci.h"
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#include "bits.h"
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#include "host.h"
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static struct hc_driver __read_mostly ci_ehci_hc_driver;
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static int (*orig_bus_suspend)(struct usb_hcd *hcd);
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struct ehci_ci_priv {
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struct regulator *reg_vbus;
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};
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static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
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{
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
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struct device *dev = hcd->self.controller;
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struct ci_hdrc *ci = dev_get_drvdata(dev);
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int ret = 0;
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int port = HCS_N_PORTS(ehci->hcs_params);
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if (priv->reg_vbus) {
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if (port > 1) {
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dev_warn(dev,
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"Not support multi-port regulator control\n");
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return 0;
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}
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if (enable)
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ret = regulator_enable(priv->reg_vbus);
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else
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ret = regulator_disable(priv->reg_vbus);
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if (ret) {
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dev_err(dev,
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"Failed to %s vbus regulator, ret=%d\n",
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enable ? "enable" : "disable", ret);
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return ret;
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}
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}
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if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
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/*
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* Marvell 28nm HSIC PHY requires forcing the port to HS mode.
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* As HSIC is always HS, this should be safe for others.
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*/
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hw_port_test_set(ci, 5);
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hw_port_test_set(ci, 0);
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}
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return 0;
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};
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static int ehci_ci_reset(struct usb_hcd *hcd)
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{
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struct device *dev = hcd->self.controller;
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struct ci_hdrc *ci = dev_get_drvdata(dev);
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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int ret;
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ret = ehci_setup(hcd);
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if (ret)
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return ret;
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ehci->need_io_watchdog = 0;
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if (ci->platdata->notify_event) {
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ret = ci->platdata->notify_event(ci,
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CI_HDRC_CONTROLLER_RESET_EVENT);
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if (ret)
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return ret;
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}
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ci_platform_configure(ci);
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return ret;
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}
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static const struct ehci_driver_overrides ehci_ci_overrides = {
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.extra_priv_size = sizeof(struct ehci_ci_priv),
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.port_power = ehci_ci_portpower,
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.reset = ehci_ci_reset,
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};
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static irqreturn_t host_irq(struct ci_hdrc *ci)
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{
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return usb_hcd_irq(ci->irq, ci->hcd);
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}
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static int host_start(struct ci_hdrc *ci)
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{
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struct usb_hcd *hcd;
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struct ehci_hcd *ehci;
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struct ehci_ci_priv *priv;
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int ret;
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if (usb_disabled())
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return -ENODEV;
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hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
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ci->dev, dev_name(ci->dev), NULL);
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if (!hcd)
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return -ENOMEM;
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dev_set_drvdata(ci->dev, ci);
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hcd->rsrc_start = ci->hw_bank.phys;
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hcd->rsrc_len = ci->hw_bank.size;
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hcd->regs = ci->hw_bank.abs;
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hcd->has_tt = 1;
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hcd->power_budget = ci->platdata->power_budget;
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hcd->tpl_support = ci->platdata->tpl_support;
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if (ci->phy || ci->usb_phy)
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hcd->skip_phy_initialization = 1;
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ehci = hcd_to_ehci(hcd);
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ehci->caps = ci->hw_bank.cap;
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ehci->has_hostpc = ci->hw_bank.lpm;
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ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
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ehci->imx28_write_fix = ci->imx28_write_fix;
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priv = (struct ehci_ci_priv *)ehci->priv;
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priv->reg_vbus = NULL;
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if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
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if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
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ret = regulator_enable(ci->platdata->reg_vbus);
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if (ret) {
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dev_err(ci->dev,
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"Failed to enable vbus regulator, ret=%d\n",
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ret);
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goto put_hcd;
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}
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} else {
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priv->reg_vbus = ci->platdata->reg_vbus;
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}
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}
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ret = usb_add_hcd(hcd, 0, 0);
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if (ret) {
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goto disable_reg;
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} else {
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struct usb_otg *otg = &ci->otg;
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ci->hcd = hcd;
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if (ci_otg_is_fsm_mode(ci)) {
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otg->host = &hcd->self;
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hcd->self.otg_port = 1;
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}
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}
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return ret;
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disable_reg:
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if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
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(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
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regulator_disable(ci->platdata->reg_vbus);
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put_hcd:
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usb_put_hcd(hcd);
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return ret;
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}
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static void host_stop(struct ci_hdrc *ci)
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{
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struct usb_hcd *hcd = ci->hcd;
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if (hcd) {
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if (ci->platdata->notify_event)
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ci->platdata->notify_event(ci,
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CI_HDRC_CONTROLLER_STOPPED_EVENT);
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usb_remove_hcd(hcd);
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ci->role = CI_ROLE_END;
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synchronize_irq(ci->irq);
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usb_put_hcd(hcd);
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if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
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(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
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regulator_disable(ci->platdata->reg_vbus);
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}
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ci->hcd = NULL;
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ci->otg.host = NULL;
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}
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void ci_hdrc_host_destroy(struct ci_hdrc *ci)
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{
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if (ci->role == CI_ROLE_HOST && ci->hcd)
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host_stop(ci);
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}
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static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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int port;
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u32 tmp;
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int ret = orig_bus_suspend(hcd);
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if (ret)
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return ret;
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port = HCS_N_PORTS(ehci->hcs_params);
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while (port--) {
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u32 __iomem *reg = &ehci->regs->port_status[port];
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u32 portsc = ehci_readl(ehci, reg);
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if (portsc & PORT_CONNECT) {
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/*
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* For chipidea, the resume signal will be ended
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* automatically, so for remote wakeup case, the
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* usbcmd.rs may not be set before the resume has
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* ended if other resume paths consumes too much
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* time (~24ms), in that case, the SOF will not
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* send out within 3ms after resume ends, then the
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* high speed device will enter full speed mode.
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*/
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tmp = ehci_readl(ehci, &ehci->regs->command);
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tmp |= CMD_RUN;
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ehci_writel(ehci, tmp, &ehci->regs->command);
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/*
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* It needs a short delay between set RS bit and PHCD.
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*/
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usleep_range(150, 200);
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break;
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}
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}
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return 0;
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}
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int ci_hdrc_host_init(struct ci_hdrc *ci)
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{
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struct ci_role_driver *rdrv;
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if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
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return -ENXIO;
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rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
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if (!rdrv)
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return -ENOMEM;
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rdrv->start = host_start;
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rdrv->stop = host_stop;
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rdrv->irq = host_irq;
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rdrv->name = "host";
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ci->roles[CI_ROLE_HOST] = rdrv;
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return 0;
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}
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void ci_hdrc_host_driver_init(void)
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{
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ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
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orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
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ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
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}
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