Majd Dibbiny ea8af0d2f2 IB/mlx5: Enable ECN capable bits for UD RoCE v2 QPs ... When working with RC QPs, the FW sets the ECN capable bits for all the RoCE v2 packets. On the other hand, for UD QPs, the driver needs to set the the ECN capable bits in the Address Handler since the HW generates each packet according to the Address Handler and not the QP context. If ECN is not enabled in NIC or switch, these bits are ignored. Fixes: 2811ba51b0 ("IB/mlx5: Add RoCE fields to Address Vector") Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Majd Dibbiny <majd@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>		2018-03-27 14:43:10 -06:00
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core	RDMA/ucma: Fix uABI structure layouts for 32/64 compat	2018-03-27 14:25:08 -06:00
hw	IB/mlx5: Enable ECN capable bits for UD RoCE v2 QPs	2018-03-27 14:43:10 -06:00
sw	RDMA/rxe: Fix uABI structure layouts for 32/64 compat	2018-03-27 14:25:09 -06:00
ulp	IB/srp: Disallow duplicate RDMA/CM connections	2018-03-19 13:54:50 -06:00
Kconfig	IB/uverbs: Enable ioctl() uAPI by default for new verbs	2018-03-19 14:45:17 -06:00
Makefile	IB/rdmavt: Create module framework and handle driver registration	2016-03-10 20:37:04 -05:00