6d60b6ee0c
This patch contains code that interfaces with devices that are mandated by the RISC-V supervisor specification and that don't have explicit drivers anywhere else in the tree. This includes the staticly defined interrupts, the CSR-mapped timer, and virtualized SBI devices. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
60 lines
1.3 KiB
C
60 lines
1.3 KiB
C
/*
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* Copyright (C) 2012 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_TIMEX_H
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#define _ASM_RISCV_TIMEX_H
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#include <asm/param.h>
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typedef unsigned long cycles_t;
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static inline cycles_t get_cycles(void)
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{
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cycles_t n;
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__asm__ __volatile__ (
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"rdtime %0"
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: "=r" (n));
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return n;
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}
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#ifdef CONFIG_64BIT
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static inline uint64_t get_cycles64(void)
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{
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return get_cycles();
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}
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#else
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static inline uint64_t get_cycles64(void)
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{
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u32 lo, hi, tmp;
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__asm__ __volatile__ (
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"1:\n"
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"rdtimeh %0\n"
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"rdtime %1\n"
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"rdtimeh %2\n"
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"bne %0, %2, 1b"
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: "=&r" (hi), "=&r" (lo), "=&r" (tmp));
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return ((u64)hi << 32) | lo;
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}
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#endif
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#define ARCH_HAS_READ_CURRENT_TIMER
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static inline int read_current_timer(unsigned long *timer_val)
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{
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*timer_val = get_cycles();
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return 0;
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}
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#endif /* _ASM_RISCV_TIMEX_H */
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