forked from Minki/linux
71416bea5a
While sending interrupts to a cpu to repeatedly wake a thread, on occasion that thread will take a full timer tick cycle (4002 usec in my case) to wakeup. The problem concerns a race condition in the code around the safe_halt() call in the default_idle() routine. Setting 'nohalt' on the kernel command line causes the long wakeups to disappear. void default_idle (void) { local_irq_enable(); while (!need_resched()) { --> if (can_do_pal_halt) --> safe_halt(); else A timer tick could arrive between the check for !need_resched and the actual call to safe_halt() (which does a pal call to PAL_HALT_LIGHT). By the time the timer tick completes, a thread that might now need to run could get held up for as long as a timer tick waiting for the halted cpu. I'm proposing that we disable irq's and check need_resched again before calling safe_halt(). Does anyone see any problem with this approach? Signed-off-by: Dimitri Sivanich <sivanich@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
856 lines
22 KiB
C
856 lines
22 KiB
C
/*
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* Architecture-specific setup.
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*
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* Copyright (C) 1998-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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* 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
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*
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* 2005-10-07 Keith Owens <kaos@sgi.com>
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* Add notify_die() hooks.
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*/
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#include <linux/cpu.h>
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#include <linux/pm.h>
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#include <linux/elf.h>
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#include <linux/errno.h>
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#include <linux/kallsyms.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/notifier.h>
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#include <linux/personality.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/stddef.h>
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#include <linux/thread_info.h>
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#include <linux/unistd.h>
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#include <linux/efi.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/kdebug.h>
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#include <asm/cpu.h>
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#include <asm/delay.h>
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#include <asm/elf.h>
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#include <asm/ia32.h>
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#include <asm/irq.h>
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#include <asm/kexec.h>
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#include <asm/pgalloc.h>
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#include <asm/processor.h>
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#include <asm/sal.h>
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#include <asm/tlbflush.h>
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#include <asm/uaccess.h>
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#include <asm/unwind.h>
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#include <asm/user.h>
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#include "entry.h"
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#ifdef CONFIG_PERFMON
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# include <asm/perfmon.h>
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#endif
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#include "sigframe.h"
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void (*ia64_mark_idle)(int);
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static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
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unsigned long boot_option_idle_override = 0;
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EXPORT_SYMBOL(boot_option_idle_override);
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void
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ia64_do_show_stack (struct unw_frame_info *info, void *arg)
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{
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unsigned long ip, sp, bsp;
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char buf[128]; /* don't make it so big that it overflows the stack! */
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printk("\nCall Trace:\n");
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do {
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unw_get_ip(info, &ip);
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if (ip == 0)
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break;
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unw_get_sp(info, &sp);
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unw_get_bsp(info, &bsp);
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snprintf(buf, sizeof(buf),
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" [<%016lx>] %%s\n"
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" sp=%016lx bsp=%016lx\n",
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ip, sp, bsp);
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print_symbol(buf, ip);
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} while (unw_unwind(info) >= 0);
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}
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void
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show_stack (struct task_struct *task, unsigned long *sp)
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{
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if (!task)
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unw_init_running(ia64_do_show_stack, NULL);
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else {
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struct unw_frame_info info;
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unw_init_from_blocked_task(&info, task);
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ia64_do_show_stack(&info, NULL);
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}
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}
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void
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dump_stack (void)
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{
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show_stack(NULL, NULL);
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}
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EXPORT_SYMBOL(dump_stack);
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void
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show_regs (struct pt_regs *regs)
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{
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unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
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print_modules();
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printk("\nPid: %d, CPU %d, comm: %20s\n", current->pid, smp_processor_id(), current->comm);
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printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
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regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
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print_symbol("ip is at %s\n", ip);
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printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
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regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
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printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
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regs->ar_rnat, regs->ar_bspstore, regs->pr);
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printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
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regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
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printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
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printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
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printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
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regs->f6.u.bits[1], regs->f6.u.bits[0],
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regs->f7.u.bits[1], regs->f7.u.bits[0]);
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printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
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regs->f8.u.bits[1], regs->f8.u.bits[0],
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regs->f9.u.bits[1], regs->f9.u.bits[0]);
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printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
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regs->f10.u.bits[1], regs->f10.u.bits[0],
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regs->f11.u.bits[1], regs->f11.u.bits[0]);
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printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
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printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
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printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
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printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
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printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
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printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
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printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
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printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
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printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
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if (user_mode(regs)) {
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/* print the stacked registers */
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unsigned long val, *bsp, ndirty;
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int i, sof, is_nat = 0;
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sof = regs->cr_ifs & 0x7f; /* size of frame */
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ndirty = (regs->loadrs >> 19);
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bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
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for (i = 0; i < sof; ++i) {
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get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
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printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
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((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
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}
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} else
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show_stack(NULL, NULL);
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}
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void
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do_notify_resume_user (sigset_t *unused, struct sigscratch *scr, long in_syscall)
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{
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if (fsys_mode(current, &scr->pt)) {
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/* defer signal-handling etc. until we return to privilege-level 0. */
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if (!ia64_psr(&scr->pt)->lp)
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ia64_psr(&scr->pt)->lp = 1;
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return;
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}
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#ifdef CONFIG_PERFMON
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if (current->thread.pfm_needs_checking)
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pfm_handle_work();
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#endif
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/* deal with pending signal delivery */
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if (test_thread_flag(TIF_SIGPENDING)||test_thread_flag(TIF_RESTORE_SIGMASK))
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ia64_do_signal(scr, in_syscall);
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}
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static int pal_halt = 1;
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static int can_do_pal_halt = 1;
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static int __init nohalt_setup(char * str)
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{
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pal_halt = can_do_pal_halt = 0;
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return 1;
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}
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__setup("nohalt", nohalt_setup);
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void
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update_pal_halt_status(int status)
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{
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can_do_pal_halt = pal_halt && status;
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}
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/*
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* We use this if we don't have any better idle routine..
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*/
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void
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default_idle (void)
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{
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local_irq_enable();
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while (!need_resched()) {
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if (can_do_pal_halt) {
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local_irq_disable();
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if (!need_resched()) {
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safe_halt();
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}
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local_irq_enable();
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} else
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cpu_relax();
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}
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}
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#ifdef CONFIG_HOTPLUG_CPU
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/* We don't actually take CPU down, just spin without interrupts. */
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static inline void play_dead(void)
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{
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extern void ia64_cpu_local_tick (void);
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unsigned int this_cpu = smp_processor_id();
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/* Ack it */
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__get_cpu_var(cpu_state) = CPU_DEAD;
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max_xtp();
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local_irq_disable();
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idle_task_exit();
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ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
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/*
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* The above is a point of no-return, the processor is
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* expected to be in SAL loop now.
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*/
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BUG();
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}
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#else
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static inline void play_dead(void)
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{
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BUG();
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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void cpu_idle_wait(void)
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{
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unsigned int cpu, this_cpu = get_cpu();
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cpumask_t map;
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cpumask_t tmp = current->cpus_allowed;
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set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
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put_cpu();
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cpus_clear(map);
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for_each_online_cpu(cpu) {
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per_cpu(cpu_idle_state, cpu) = 1;
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cpu_set(cpu, map);
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}
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__get_cpu_var(cpu_idle_state) = 0;
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wmb();
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do {
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ssleep(1);
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for_each_online_cpu(cpu) {
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if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
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cpu_clear(cpu, map);
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}
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cpus_and(map, map, cpu_online_map);
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} while (!cpus_empty(map));
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set_cpus_allowed(current, tmp);
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}
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EXPORT_SYMBOL_GPL(cpu_idle_wait);
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void __attribute__((noreturn))
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cpu_idle (void)
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{
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void (*mark_idle)(int) = ia64_mark_idle;
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int cpu = smp_processor_id();
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/* endless idle loop with no priority at all */
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while (1) {
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if (can_do_pal_halt) {
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current_thread_info()->status &= ~TS_POLLING;
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/*
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* TS_POLLING-cleared state must be visible before we
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* test NEED_RESCHED:
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*/
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smp_mb();
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} else {
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current_thread_info()->status |= TS_POLLING;
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}
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if (!need_resched()) {
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void (*idle)(void);
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#ifdef CONFIG_SMP
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min_xtp();
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#endif
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if (__get_cpu_var(cpu_idle_state))
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__get_cpu_var(cpu_idle_state) = 0;
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rmb();
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if (mark_idle)
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(*mark_idle)(1);
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idle = pm_idle;
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if (!idle)
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idle = default_idle;
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(*idle)();
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if (mark_idle)
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(*mark_idle)(0);
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#ifdef CONFIG_SMP
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normal_xtp();
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#endif
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}
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preempt_enable_no_resched();
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schedule();
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preempt_disable();
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check_pgt_cache();
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if (cpu_is_offline(cpu))
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play_dead();
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}
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}
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void
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ia64_save_extra (struct task_struct *task)
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{
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#ifdef CONFIG_PERFMON
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unsigned long info;
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#endif
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if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
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ia64_save_debug_regs(&task->thread.dbr[0]);
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#ifdef CONFIG_PERFMON
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if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
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pfm_save_regs(task);
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info = __get_cpu_var(pfm_syst_info);
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if (info & PFM_CPUINFO_SYST_WIDE)
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pfm_syst_wide_update_task(task, info, 0);
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#endif
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#ifdef CONFIG_IA32_SUPPORT
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if (IS_IA32_PROCESS(task_pt_regs(task)))
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ia32_save_state(task);
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#endif
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}
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void
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ia64_load_extra (struct task_struct *task)
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{
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#ifdef CONFIG_PERFMON
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unsigned long info;
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#endif
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if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
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ia64_load_debug_regs(&task->thread.dbr[0]);
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#ifdef CONFIG_PERFMON
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if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
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pfm_load_regs(task);
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info = __get_cpu_var(pfm_syst_info);
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if (info & PFM_CPUINFO_SYST_WIDE)
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pfm_syst_wide_update_task(task, info, 1);
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#endif
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#ifdef CONFIG_IA32_SUPPORT
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if (IS_IA32_PROCESS(task_pt_regs(task)))
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ia32_load_state(task);
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#endif
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}
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/*
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* Copy the state of an ia-64 thread.
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*
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* We get here through the following call chain:
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*
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* from user-level: from kernel:
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*
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* <clone syscall> <some kernel call frames>
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* sys_clone :
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* do_fork do_fork
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* copy_thread copy_thread
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*
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* This means that the stack layout is as follows:
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*
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* +---------------------+ (highest addr)
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* | struct pt_regs |
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* +---------------------+
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* | struct switch_stack |
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* +---------------------+
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* | |
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* | memory stack |
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* | | <-- sp (lowest addr)
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* +---------------------+
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*
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* Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
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* integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
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* with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
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* pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
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* the stack is page aligned and the page size is at least 4KB, this is always the case,
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* so there is nothing to worry about.
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*/
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int
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copy_thread (int nr, unsigned long clone_flags,
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unsigned long user_stack_base, unsigned long user_stack_size,
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struct task_struct *p, struct pt_regs *regs)
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{
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extern char ia64_ret_from_clone, ia32_ret_from_clone;
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struct switch_stack *child_stack, *stack;
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unsigned long rbs, child_rbs, rbs_size;
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struct pt_regs *child_ptregs;
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int retval = 0;
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#ifdef CONFIG_SMP
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/*
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* For SMP idle threads, fork_by_hand() calls do_fork with
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* NULL regs.
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*/
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if (!regs)
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return 0;
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#endif
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stack = ((struct switch_stack *) regs) - 1;
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child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
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child_stack = (struct switch_stack *) child_ptregs - 1;
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/* copy parent's switch_stack & pt_regs to child: */
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memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
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rbs = (unsigned long) current + IA64_RBS_OFFSET;
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child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
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rbs_size = stack->ar_bspstore - rbs;
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/* copy the parent's register backing store to the child: */
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memcpy((void *) child_rbs, (void *) rbs, rbs_size);
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if (likely(user_mode(child_ptregs))) {
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if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
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child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
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if (user_stack_base) {
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child_ptregs->r12 = user_stack_base + user_stack_size - 16;
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child_ptregs->ar_bspstore = user_stack_base;
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child_ptregs->ar_rnat = 0;
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child_ptregs->loadrs = 0;
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}
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} else {
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/*
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* Note: we simply preserve the relative position of
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* the stack pointer here. There is no need to
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* allocate a scratch area here, since that will have
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* been taken care of by the caller of sys_clone()
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* already.
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*/
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child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
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child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
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}
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child_stack->ar_bspstore = child_rbs + rbs_size;
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if (IS_IA32_PROCESS(regs))
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child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
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else
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child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
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/* copy parts of thread_struct: */
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p->thread.ksp = (unsigned long) child_stack - 16;
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|
|
/* stop some PSR bits from being inherited.
|
|
* the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
|
|
* therefore we must specify them explicitly here and not include them in
|
|
* IA64_PSR_BITS_TO_CLEAR.
|
|
*/
|
|
child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
|
|
& ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
|
|
|
|
/*
|
|
* NOTE: The calling convention considers all floating point
|
|
* registers in the high partition (fph) to be scratch. Since
|
|
* the only way to get to this point is through a system call,
|
|
* we know that the values in fph are all dead. Hence, there
|
|
* is no need to inherit the fph state from the parent to the
|
|
* child and all we have to do is to make sure that
|
|
* IA64_THREAD_FPH_VALID is cleared in the child.
|
|
*
|
|
* XXX We could push this optimization a bit further by
|
|
* clearing IA64_THREAD_FPH_VALID on ANY system call.
|
|
* However, it's not clear this is worth doing. Also, it
|
|
* would be a slight deviation from the normal Linux system
|
|
* call behavior where scratch registers are preserved across
|
|
* system calls (unless used by the system call itself).
|
|
*/
|
|
# define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
|
|
| IA64_THREAD_PM_VALID)
|
|
# define THREAD_FLAGS_TO_SET 0
|
|
p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
|
|
| THREAD_FLAGS_TO_SET);
|
|
ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
|
|
#ifdef CONFIG_IA32_SUPPORT
|
|
/*
|
|
* If we're cloning an IA32 task then save the IA32 extra
|
|
* state from the current task to the new task
|
|
*/
|
|
if (IS_IA32_PROCESS(task_pt_regs(current))) {
|
|
ia32_save_state(p);
|
|
if (clone_flags & CLONE_SETTLS)
|
|
retval = ia32_clone_tls(p, child_ptregs);
|
|
|
|
/* Copy partially mapped page list */
|
|
if (!retval)
|
|
retval = ia32_copy_ia64_partial_page_list(p,
|
|
clone_flags);
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_PERFMON
|
|
if (current->thread.pfm_context)
|
|
pfm_inherit(p, child_ptregs);
|
|
#endif
|
|
return retval;
|
|
}
|
|
|
|
static void
|
|
do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
|
|
{
|
|
unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
|
|
unsigned long uninitialized_var(ip); /* GCC be quiet */
|
|
elf_greg_t *dst = arg;
|
|
struct pt_regs *pt;
|
|
char nat;
|
|
int i;
|
|
|
|
memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
|
|
|
|
if (unw_unwind_to_user(info) < 0)
|
|
return;
|
|
|
|
unw_get_sp(info, &sp);
|
|
pt = (struct pt_regs *) (sp + 16);
|
|
|
|
urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
|
|
|
|
if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
|
|
return;
|
|
|
|
ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
|
|
&ar_rnat);
|
|
|
|
/*
|
|
* coredump format:
|
|
* r0-r31
|
|
* NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
|
|
* predicate registers (p0-p63)
|
|
* b0-b7
|
|
* ip cfm user-mask
|
|
* ar.rsc ar.bsp ar.bspstore ar.rnat
|
|
* ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
|
|
*/
|
|
|
|
/* r0 is zero */
|
|
for (i = 1, mask = (1UL << i); i < 32; ++i) {
|
|
unw_get_gr(info, i, &dst[i], &nat);
|
|
if (nat)
|
|
nat_bits |= mask;
|
|
mask <<= 1;
|
|
}
|
|
dst[32] = nat_bits;
|
|
unw_get_pr(info, &dst[33]);
|
|
|
|
for (i = 0; i < 8; ++i)
|
|
unw_get_br(info, i, &dst[34 + i]);
|
|
|
|
unw_get_rp(info, &ip);
|
|
dst[42] = ip + ia64_psr(pt)->ri;
|
|
dst[43] = cfm;
|
|
dst[44] = pt->cr_ipsr & IA64_PSR_UM;
|
|
|
|
unw_get_ar(info, UNW_AR_RSC, &dst[45]);
|
|
/*
|
|
* For bsp and bspstore, unw_get_ar() would return the kernel
|
|
* addresses, but we need the user-level addresses instead:
|
|
*/
|
|
dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
|
|
dst[47] = pt->ar_bspstore;
|
|
dst[48] = ar_rnat;
|
|
unw_get_ar(info, UNW_AR_CCV, &dst[49]);
|
|
unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
|
|
unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
|
|
dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
|
|
unw_get_ar(info, UNW_AR_LC, &dst[53]);
|
|
unw_get_ar(info, UNW_AR_EC, &dst[54]);
|
|
unw_get_ar(info, UNW_AR_CSD, &dst[55]);
|
|
unw_get_ar(info, UNW_AR_SSD, &dst[56]);
|
|
}
|
|
|
|
void
|
|
do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
|
|
{
|
|
elf_fpreg_t *dst = arg;
|
|
int i;
|
|
|
|
memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
|
|
|
|
if (unw_unwind_to_user(info) < 0)
|
|
return;
|
|
|
|
/* f0 is 0.0, f1 is 1.0 */
|
|
|
|
for (i = 2; i < 32; ++i)
|
|
unw_get_fr(info, i, dst + i);
|
|
|
|
ia64_flush_fph(task);
|
|
if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
|
|
memcpy(dst + 32, task->thread.fph, 96*16);
|
|
}
|
|
|
|
void
|
|
do_copy_regs (struct unw_frame_info *info, void *arg)
|
|
{
|
|
do_copy_task_regs(current, info, arg);
|
|
}
|
|
|
|
void
|
|
do_dump_fpu (struct unw_frame_info *info, void *arg)
|
|
{
|
|
do_dump_task_fpu(current, info, arg);
|
|
}
|
|
|
|
int
|
|
dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
|
|
{
|
|
struct unw_frame_info tcore_info;
|
|
|
|
if (current == task) {
|
|
unw_init_running(do_copy_regs, regs);
|
|
} else {
|
|
memset(&tcore_info, 0, sizeof(tcore_info));
|
|
unw_init_from_blocked_task(&tcore_info, task);
|
|
do_copy_task_regs(task, &tcore_info, regs);
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
void
|
|
ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
|
|
{
|
|
unw_init_running(do_copy_regs, dst);
|
|
}
|
|
|
|
int
|
|
dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
|
|
{
|
|
struct unw_frame_info tcore_info;
|
|
|
|
if (current == task) {
|
|
unw_init_running(do_dump_fpu, dst);
|
|
} else {
|
|
memset(&tcore_info, 0, sizeof(tcore_info));
|
|
unw_init_from_blocked_task(&tcore_info, task);
|
|
do_dump_task_fpu(task, &tcore_info, dst);
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
int
|
|
dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
|
|
{
|
|
unw_init_running(do_dump_fpu, dst);
|
|
return 1; /* f0-f31 are always valid so we always return 1 */
|
|
}
|
|
|
|
long
|
|
sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
|
|
struct pt_regs *regs)
|
|
{
|
|
char *fname;
|
|
int error;
|
|
|
|
fname = getname(filename);
|
|
error = PTR_ERR(fname);
|
|
if (IS_ERR(fname))
|
|
goto out;
|
|
error = do_execve(fname, argv, envp, regs);
|
|
putname(fname);
|
|
out:
|
|
return error;
|
|
}
|
|
|
|
pid_t
|
|
kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
|
|
{
|
|
extern void start_kernel_thread (void);
|
|
unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
|
|
struct {
|
|
struct switch_stack sw;
|
|
struct pt_regs pt;
|
|
} regs;
|
|
|
|
memset(®s, 0, sizeof(regs));
|
|
regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
|
|
regs.pt.r1 = helper_fptr[1]; /* set GP */
|
|
regs.pt.r9 = (unsigned long) fn; /* 1st argument */
|
|
regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
|
|
/* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
|
|
regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
|
|
regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
|
|
regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
|
|
regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
|
|
regs.sw.pr = (1 << PRED_KERNEL_STACK);
|
|
return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s.pt, 0, NULL, NULL);
|
|
}
|
|
EXPORT_SYMBOL(kernel_thread);
|
|
|
|
/* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
|
|
int
|
|
kernel_thread_helper (int (*fn)(void *), void *arg)
|
|
{
|
|
#ifdef CONFIG_IA32_SUPPORT
|
|
if (IS_IA32_PROCESS(task_pt_regs(current))) {
|
|
/* A kernel thread is always a 64-bit process. */
|
|
current->thread.map_base = DEFAULT_MAP_BASE;
|
|
current->thread.task_size = DEFAULT_TASK_SIZE;
|
|
ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
|
|
ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
|
|
}
|
|
#endif
|
|
return (*fn)(arg);
|
|
}
|
|
|
|
/*
|
|
* Flush thread state. This is called when a thread does an execve().
|
|
*/
|
|
void
|
|
flush_thread (void)
|
|
{
|
|
/* drop floating-point and debug-register state if it exists: */
|
|
current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
|
|
ia64_drop_fpu(current);
|
|
#ifdef CONFIG_IA32_SUPPORT
|
|
if (IS_IA32_PROCESS(task_pt_regs(current))) {
|
|
ia32_drop_ia64_partial_page_list(current);
|
|
current->thread.task_size = IA32_PAGE_OFFSET;
|
|
set_fs(USER_DS);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Clean up state associated with current thread. This is called when
|
|
* the thread calls exit().
|
|
*/
|
|
void
|
|
exit_thread (void)
|
|
{
|
|
|
|
ia64_drop_fpu(current);
|
|
#ifdef CONFIG_PERFMON
|
|
/* if needed, stop monitoring and flush state to perfmon context */
|
|
if (current->thread.pfm_context)
|
|
pfm_exit_thread(current);
|
|
|
|
/* free debug register resources */
|
|
if (current->thread.flags & IA64_THREAD_DBG_VALID)
|
|
pfm_release_debug_registers(current);
|
|
#endif
|
|
if (IS_IA32_PROCESS(task_pt_regs(current)))
|
|
ia32_drop_ia64_partial_page_list(current);
|
|
}
|
|
|
|
unsigned long
|
|
get_wchan (struct task_struct *p)
|
|
{
|
|
struct unw_frame_info info;
|
|
unsigned long ip;
|
|
int count = 0;
|
|
|
|
if (!p || p == current || p->state == TASK_RUNNING)
|
|
return 0;
|
|
|
|
/*
|
|
* Note: p may not be a blocked task (it could be current or
|
|
* another process running on some other CPU. Rather than
|
|
* trying to determine if p is really blocked, we just assume
|
|
* it's blocked and rely on the unwind routines to fail
|
|
* gracefully if the process wasn't really blocked after all.
|
|
* --davidm 99/12/15
|
|
*/
|
|
unw_init_from_blocked_task(&info, p);
|
|
do {
|
|
if (p->state == TASK_RUNNING)
|
|
return 0;
|
|
if (unw_unwind(&info) < 0)
|
|
return 0;
|
|
unw_get_ip(&info, &ip);
|
|
if (!in_sched_functions(ip))
|
|
return ip;
|
|
} while (count++ < 16);
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
cpu_halt (void)
|
|
{
|
|
pal_power_mgmt_info_u_t power_info[8];
|
|
unsigned long min_power;
|
|
int i, min_power_state;
|
|
|
|
if (ia64_pal_halt_info(power_info) != 0)
|
|
return;
|
|
|
|
min_power_state = 0;
|
|
min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
|
|
for (i = 1; i < 8; ++i)
|
|
if (power_info[i].pal_power_mgmt_info_s.im
|
|
&& power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
|
|
min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
|
|
min_power_state = i;
|
|
}
|
|
|
|
while (1)
|
|
ia64_pal_halt(min_power_state);
|
|
}
|
|
|
|
void machine_shutdown(void)
|
|
{
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
int cpu;
|
|
|
|
for_each_online_cpu(cpu) {
|
|
if (cpu != smp_processor_id())
|
|
cpu_down(cpu);
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_KEXEC
|
|
kexec_disable_iosapic();
|
|
#endif
|
|
}
|
|
|
|
void
|
|
machine_restart (char *restart_cmd)
|
|
{
|
|
(void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
|
|
(*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
|
|
}
|
|
|
|
void
|
|
machine_halt (void)
|
|
{
|
|
(void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
|
|
cpu_halt();
|
|
}
|
|
|
|
void
|
|
machine_power_off (void)
|
|
{
|
|
if (pm_power_off)
|
|
pm_power_off();
|
|
machine_halt();
|
|
}
|
|
|