forked from Minki/linux
8a20a04bda
Here are some final updates for ARM SoC specific dts files:
* The i.MX changes were sent relatively late, and had a dependency
on the clk tree, so I delayed that a bit. Support for the new
i.MX6qp SoC and a couple of new boards is added in this branch.
* Uniphier renames a few files to match the final product names
that were decided by the company, kudos to the kernel developer(s)
for getting support upstream before the product release.
Also two boards are added. The patches were posted early enough
and nice overall, but we forgot to apply them and decided to
give it some more time in linux-next
* at91 has two small bug fixes.
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Merge tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull more ARM DT changes from Arnd Bergmann:
"Here are some final updates for ARM SoC specific dts files:
- The i.MX changes were sent relatively late, and had a dependency on
the clk tree, so I delayed that a bit. Support for the new i.MX6qp
SoC and a couple of new boards is added in this branch.
- Uniphier renames a few files to match the final product names that
were decided by the company, kudos to the kernel developer(s) for
getting support upstream before the product release. Also two
boards are added. The patches were posted early enough and nice
overall, but we forgot to apply them and decided to give it some
more time in linux-next
- at91 has two small bug fixes"
* tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: dts: at91: sama5d4 Xplained: don't disable hsmci regulator
ARM: dts: at91: sama5d3 Xplained: don't disable hsmci regulator
ARM: dts: uniphier: add pinmux node for I2C ch4
ARM: dts: uniphier: add @{address} to EEPROM node
ARM: dts: uniphier: add PH1-Pro4 Sanji board support
ARM: dts: uniphier: add PH1-Pro4 Ace board support
ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board
ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board
ARM: dts: uniphier: add reference clock nodes
ARM: dts: uniphier: rework UniPhier System Bus nodes
ARM: dts: uniphier: factor out ranges property of support card
arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20
ARM: dts: imx53-qsb: Fix gpio button polarity
ARM: dts: vfxxx: Add DAC node for Vybrid SoC
ARM: dts: imx6q: add missing links between ipu2 and mipi dsi
ARM: dts: imx: Add support for Advantech/GE B850v3
ARM: dts: imx: Add support for Advantech/GE B650v3
ARM: dts: imx: Add support for Advantech/GE B450v3
ARM: dts: imx: Add support for Advantech/GE Bx50v3
ARM: dts: imx: Add Advantech BA-16 Qseven module
...
733 lines
19 KiB
Plaintext
733 lines
19 KiB
Plaintext
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "vf610-pinfunc.h"
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#include <dt-bindings/clock/vf610-clock.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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aliases {
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can0 = &can0;
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can1 = &can1;
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ethernet0 = &fec0;
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ethernet1 = &fec1;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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gpio4 = &gpio4;
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usbphy0 = &usbphy0;
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usbphy1 = &usbphy1;
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};
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fxosc: fxosc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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};
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sxosc: sxosc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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reboot: syscon-reboot {
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compatible = "syscon-reboot";
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regmap = <&src>;
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offset = <0x0>;
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mask = <0x1000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&mscm_ir>;
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ranges;
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aips0: aips-bus@40000000 {
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mscm_cpucfg: cpucfg@40001000 {
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compatible = "fsl,vf610-mscm-cpucfg", "syscon";
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reg = <0x40001000 0x800>;
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};
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mscm_ir: interrupt-controller@40001800 {
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compatible = "fsl,vf610-mscm-ir";
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reg = <0x40001800 0x400>;
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fsl,cpucfg = <&mscm_cpucfg>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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edma0: dma-controller@40018000 {
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#dma-cells = <2>;
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compatible = "fsl,vf610-edma";
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reg = <0x40018000 0x2000>,
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<0x40024000 0x1000>,
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<0x40025000 0x1000>;
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dma-channels = <32>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
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<9 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "edma-tx", "edma-err";
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clock-names = "dmamux0", "dmamux1";
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clocks = <&clks VF610_CLK_DMAMUX0>,
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<&clks VF610_CLK_DMAMUX1>;
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status = "disabled";
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};
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can0: flexcan@40020000 {
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compatible = "fsl,vf610-flexcan";
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reg = <0x40020000 0x4000>;
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interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_FLEXCAN0>,
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<&clks VF610_CLK_FLEXCAN0>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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uart0: serial@40027000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40027000 0x1000>;
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interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_UART0>;
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clock-names = "ipg";
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dmas = <&edma0 0 2>,
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<&edma0 0 3>;
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dma-names = "rx","tx";
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status = "disabled";
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};
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uart1: serial@40028000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40028000 0x1000>;
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interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_UART1>;
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clock-names = "ipg";
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dmas = <&edma0 0 4>,
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<&edma0 0 5>;
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dma-names = "rx","tx";
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status = "disabled";
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};
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uart2: serial@40029000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40029000 0x1000>;
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interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_UART2>;
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clock-names = "ipg";
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dmas = <&edma0 0 6>,
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<&edma0 0 7>;
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dma-names = "rx","tx";
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status = "disabled";
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};
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uart3: serial@4002a000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x4002a000 0x1000>;
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interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_UART3>;
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clock-names = "ipg";
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dmas = <&edma0 0 8>,
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<&edma0 0 9>;
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dma-names = "rx","tx";
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status = "disabled";
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};
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dspi0: dspi0@4002c000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-dspi";
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reg = <0x4002c000 0x1000>;
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interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_DSPI0>;
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clock-names = "dspi";
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spi-num-chipselects = <6>;
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status = "disabled";
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};
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dspi1: dspi1@4002d000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-dspi";
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reg = <0x4002d000 0x1000>;
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interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_DSPI1>;
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clock-names = "dspi";
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spi-num-chipselects = <4>;
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status = "disabled";
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};
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sai0: sai@4002f000 {
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compatible = "fsl,vf610-sai";
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reg = <0x4002f000 0x1000>;
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interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_SAI0>,
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<&clks VF610_CLK_SAI0_DIV>,
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<&clks 0>, <&clks 0>;
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clock-names = "bus", "mclk1", "mclk2", "mclk3";
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dma-names = "tx", "rx";
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dmas = <&edma0 0 17>,
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<&edma0 0 16>;
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status = "disabled";
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};
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sai1: sai@40030000 {
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compatible = "fsl,vf610-sai";
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reg = <0x40030000 0x1000>;
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interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_SAI1>,
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<&clks VF610_CLK_SAI1_DIV>,
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<&clks 0>, <&clks 0>;
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clock-names = "bus", "mclk1", "mclk2", "mclk3";
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dma-names = "tx", "rx";
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dmas = <&edma0 0 19>,
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<&edma0 0 18>;
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status = "disabled";
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};
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sai2: sai@40031000 {
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compatible = "fsl,vf610-sai";
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reg = <0x40031000 0x1000>;
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interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_SAI2>,
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<&clks VF610_CLK_SAI2_DIV>,
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<&clks 0>, <&clks 0>;
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clock-names = "bus", "mclk1", "mclk2", "mclk3";
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dma-names = "tx", "rx";
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dmas = <&edma0 0 21>,
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<&edma0 0 20>;
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status = "disabled";
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};
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sai3: sai@40032000 {
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compatible = "fsl,vf610-sai";
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reg = <0x40032000 0x1000>;
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interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_SAI3>,
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<&clks VF610_CLK_SAI3_DIV>,
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<&clks 0>, <&clks 0>;
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clock-names = "bus", "mclk1", "mclk2", "mclk3";
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dma-names = "tx", "rx";
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dmas = <&edma0 1 9>,
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<&edma0 1 8>;
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status = "disabled";
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};
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pit: pit@40037000 {
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compatible = "fsl,vf610-pit";
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reg = <0x40037000 0x1000>;
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interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_PIT>;
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clock-names = "pit";
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};
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pwm0: pwm@40038000 {
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compatible = "fsl,vf610-ftm-pwm";
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#pwm-cells = <3>;
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reg = <0x40038000 0x1000>;
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clock-names = "ftm_sys", "ftm_ext",
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"ftm_fix", "ftm_cnt_clk_en";
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clocks = <&clks VF610_CLK_FTM0>,
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<&clks VF610_CLK_FTM0_EXT_SEL>,
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<&clks VF610_CLK_FTM0_FIX_SEL>,
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<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
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status = "disabled";
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};
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pwm1: pwm@40039000 {
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compatible = "fsl,vf610-ftm-pwm";
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#pwm-cells = <3>;
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reg = <0x40039000 0x1000>;
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clock-names = "ftm_sys", "ftm_ext",
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"ftm_fix", "ftm_cnt_clk_en";
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clocks = <&clks VF610_CLK_FTM1>,
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<&clks VF610_CLK_FTM1_EXT_SEL>,
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<&clks VF610_CLK_FTM1_FIX_SEL>,
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<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
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status = "disabled";
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};
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adc0: adc@4003b000 {
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compatible = "fsl,vf610-adc";
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reg = <0x4003b000 0x1000>;
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interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_ADC0>;
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clock-names = "adc";
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#io-channel-cells = <1>;
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status = "disabled";
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fsl,adck-max-frequency = <30000000>, <40000000>,
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<20000000>;
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};
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wdoga5: wdog@4003e000 {
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compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
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reg = <0x4003e000 0x1000>;
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interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_WDT>;
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clock-names = "wdog";
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status = "disabled";
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};
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qspi0: quadspi@40044000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-qspi";
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reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
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reg-names = "QuadSPI", "QuadSPI-memory";
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interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_QSPI0_EN>,
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<&clks VF610_CLK_QSPI0>;
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clock-names = "qspi_en", "qspi";
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status = "disabled";
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};
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iomuxc: iomuxc@40048000 {
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compatible = "fsl,vf610-iomuxc";
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reg = <0x40048000 0x1000>;
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};
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gpio0: gpio@40049000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x40049000 0x1000 0x400ff000 0x40>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&iomuxc 0 0 32>;
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};
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gpio1: gpio@4004a000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x4004a000 0x1000 0x400ff040 0x40>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&iomuxc 0 32 32>;
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};
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gpio2: gpio@4004b000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x4004b000 0x1000 0x400ff080 0x40>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&iomuxc 0 64 32>;
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};
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gpio3: gpio@4004c000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&iomuxc 0 96 32>;
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};
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gpio4: gpio@4004d000 {
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compatible = "fsl,vf610-gpio";
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reg = <0x4004d000 0x1000 0x400ff100 0x40>;
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|
gpio-controller;
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|
#gpio-cells = <2>;
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interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
gpio-ranges = <&iomuxc 0 128 7>;
|
|
};
|
|
|
|
anatop: anatop@40050000 {
|
|
compatible = "fsl,vf610-anatop", "syscon";
|
|
reg = <0x40050000 0x400>;
|
|
};
|
|
|
|
usbphy0: usbphy@40050800 {
|
|
compatible = "fsl,vf610-usbphy";
|
|
reg = <0x40050800 0x400>;
|
|
interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_USBPHY0>;
|
|
fsl,anatop = <&anatop>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usbphy1: usbphy@40050c00 {
|
|
compatible = "fsl,vf610-usbphy";
|
|
reg = <0x40050c00 0x400>;
|
|
interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_USBPHY1>;
|
|
fsl,anatop = <&anatop>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c0: i2c@40066000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,vf610-i2c";
|
|
reg = <0x40066000 0x1000>;
|
|
interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_I2C0>;
|
|
clock-names = "ipg";
|
|
dmas = <&edma0 0 50>,
|
|
<&edma0 0 51>;
|
|
dma-names = "rx","tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@40067000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,vf610-i2c";
|
|
reg = <0x40067000 0x1000>;
|
|
interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_I2C1>;
|
|
clock-names = "ipg";
|
|
dmas = <&edma0 0 52>,
|
|
<&edma0 0 53>;
|
|
dma-names = "rx","tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
clks: ccm@4006b000 {
|
|
compatible = "fsl,vf610-ccm";
|
|
reg = <0x4006b000 0x1000>;
|
|
clocks = <&sxosc>, <&fxosc>;
|
|
clock-names = "sxosc", "fxosc";
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
usbdev0: usb@40034000 {
|
|
compatible = "fsl,vf610-usb", "fsl,imx27-usb";
|
|
reg = <0x40034000 0x800>;
|
|
interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_USBC0>;
|
|
fsl,usbphy = <&usbphy0>;
|
|
fsl,usbmisc = <&usbmisc0 0>;
|
|
dr_mode = "peripheral";
|
|
status = "disabled";
|
|
};
|
|
|
|
usbmisc0: usb@40034800 {
|
|
#index-cells = <1>;
|
|
compatible = "fsl,vf610-usbmisc";
|
|
reg = <0x40034800 0x200>;
|
|
clocks = <&clks VF610_CLK_USBC0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
src: src@4006e000 {
|
|
compatible = "fsl,vf610-src", "syscon";
|
|
reg = <0x4006e000 0x1000>;
|
|
interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
};
|
|
|
|
aips1: aips-bus@40080000 {
|
|
compatible = "fsl,aips-bus", "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
edma1: dma-controller@40098000 {
|
|
#dma-cells = <2>;
|
|
compatible = "fsl,vf610-edma";
|
|
reg = <0x40098000 0x2000>,
|
|
<0x400a1000 0x1000>,
|
|
<0x400a2000 0x1000>;
|
|
dma-channels = <32>;
|
|
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
|
|
<11 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "edma-tx", "edma-err";
|
|
clock-names = "dmamux0", "dmamux1";
|
|
clocks = <&clks VF610_CLK_DMAMUX2>,
|
|
<&clks VF610_CLK_DMAMUX3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
snvs0: snvs@400a7000 {
|
|
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
|
|
reg = <0x400a7000 0x2000>;
|
|
|
|
snvsrtc: snvs-rtc-lp {
|
|
compatible = "fsl,sec-v4.0-mon-rtc-lp";
|
|
regmap = <&snvs0>;
|
|
offset = <0x34>;
|
|
interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_SNVS>;
|
|
clock-names = "snvs-rtc";
|
|
};
|
|
};
|
|
|
|
uart4: serial@400a9000 {
|
|
compatible = "fsl,vf610-lpuart";
|
|
reg = <0x400a9000 0x1000>;
|
|
interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_UART4>;
|
|
clock-names = "ipg";
|
|
status = "disabled";
|
|
};
|
|
|
|
uart5: serial@400aa000 {
|
|
compatible = "fsl,vf610-lpuart";
|
|
reg = <0x400aa000 0x1000>;
|
|
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_UART5>;
|
|
clock-names = "ipg";
|
|
status = "disabled";
|
|
};
|
|
|
|
dspi2: dspi2@400ac000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,vf610-dspi";
|
|
reg = <0x400ac000 0x1000>;
|
|
interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_DSPI2>;
|
|
clock-names = "dspi";
|
|
spi-num-chipselects = <2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dspi3: dspi3@400ad000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,vf610-dspi";
|
|
reg = <0x400ad000 0x1000>;
|
|
interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_DSPI3>;
|
|
clock-names = "dspi";
|
|
spi-num-chipselects = <2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
adc1: adc@400bb000 {
|
|
compatible = "fsl,vf610-adc";
|
|
reg = <0x400bb000 0x1000>;
|
|
interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_ADC1>;
|
|
clock-names = "adc";
|
|
#io-channel-cells = <1>;
|
|
status = "disabled";
|
|
fsl,adck-max-frequency = <30000000>, <40000000>,
|
|
<20000000>;
|
|
};
|
|
|
|
esdhc0: esdhc@400b1000 {
|
|
compatible = "fsl,imx53-esdhc";
|
|
reg = <0x400b1000 0x1000>;
|
|
interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_IPG_BUS>,
|
|
<&clks VF610_CLK_PLATFORM_BUS>,
|
|
<&clks VF610_CLK_ESDHC0>;
|
|
clock-names = "ipg", "ahb", "per";
|
|
status = "disabled";
|
|
};
|
|
|
|
esdhc1: esdhc@400b2000 {
|
|
compatible = "fsl,imx53-esdhc";
|
|
reg = <0x400b2000 0x1000>;
|
|
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_IPG_BUS>,
|
|
<&clks VF610_CLK_PLATFORM_BUS>,
|
|
<&clks VF610_CLK_ESDHC1>;
|
|
clock-names = "ipg", "ahb", "per";
|
|
status = "disabled";
|
|
};
|
|
|
|
usbh1: usb@400b4000 {
|
|
compatible = "fsl,vf610-usb", "fsl,imx27-usb";
|
|
reg = <0x400b4000 0x800>;
|
|
interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_USBC1>;
|
|
fsl,usbphy = <&usbphy1>;
|
|
fsl,usbmisc = <&usbmisc1 0>;
|
|
dr_mode = "host";
|
|
status = "disabled";
|
|
};
|
|
|
|
usbmisc1: usb@400b4800 {
|
|
#index-cells = <1>;
|
|
compatible = "fsl,vf610-usbmisc";
|
|
reg = <0x400b4800 0x200>;
|
|
clocks = <&clks VF610_CLK_USBC1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ftm: ftm@400b8000 {
|
|
compatible = "fsl,ftm-timer";
|
|
reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
|
|
interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
|
|
clock-names = "ftm-evt", "ftm-src",
|
|
"ftm-evt-counter-en", "ftm-src-counter-en";
|
|
clocks = <&clks VF610_CLK_FTM2>,
|
|
<&clks VF610_CLK_FTM3>,
|
|
<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
|
|
<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
|
|
status = "disabled";
|
|
};
|
|
|
|
qspi1: quadspi@400c4000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,vf610-qspi";
|
|
reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
|
|
reg-names = "QuadSPI", "QuadSPI-memory";
|
|
interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_QSPI1_EN>,
|
|
<&clks VF610_CLK_QSPI1>;
|
|
clock-names = "qspi_en", "qspi";
|
|
status = "disabled";
|
|
};
|
|
|
|
dac0: dac@400cc000 {
|
|
compatible = "fsl,vf610-dac";
|
|
reg = <0x400cc000 1000>;
|
|
interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
|
|
clock-names = "dac";
|
|
clocks = <&clks VF610_CLK_DAC0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dac1: dac@400cd000 {
|
|
compatible = "fsl,vf610-dac";
|
|
reg = <0x400cd000 1000>;
|
|
interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
|
|
clock-names = "dac";
|
|
clocks = <&clks VF610_CLK_DAC1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
fec0: ethernet@400d0000 {
|
|
compatible = "fsl,mvf600-fec";
|
|
reg = <0x400d0000 0x1000>;
|
|
interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_ENET0>,
|
|
<&clks VF610_CLK_ENET0>,
|
|
<&clks VF610_CLK_ENET>;
|
|
clock-names = "ipg", "ahb", "ptp";
|
|
status = "disabled";
|
|
};
|
|
|
|
fec1: ethernet@400d1000 {
|
|
compatible = "fsl,mvf600-fec";
|
|
reg = <0x400d1000 0x1000>;
|
|
interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_ENET1>,
|
|
<&clks VF610_CLK_ENET1>,
|
|
<&clks VF610_CLK_ENET>;
|
|
clock-names = "ipg", "ahb", "ptp";
|
|
status = "disabled";
|
|
};
|
|
|
|
can1: flexcan@400d4000 {
|
|
compatible = "fsl,vf610-flexcan";
|
|
reg = <0x400d4000 0x4000>;
|
|
interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_FLEXCAN1>,
|
|
<&clks VF610_CLK_FLEXCAN1>;
|
|
clock-names = "ipg", "per";
|
|
status = "disabled";
|
|
};
|
|
|
|
nfc: nand@400e0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,vf610-nfc";
|
|
reg = <0x400e0000 0x4000>;
|
|
interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_NFC>;
|
|
clock-names = "nfc";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c2: i2c@400e6000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,vf610-i2c";
|
|
reg = <0x400e6000 0x1000>;
|
|
interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_I2C2>;
|
|
clock-names = "ipg";
|
|
dmas = <&edma0 1 36>,
|
|
<&edma0 1 37>;
|
|
dma-names = "rx","tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c3: i2c@400e7000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,vf610-i2c";
|
|
reg = <0x400e7000 0x1000>;
|
|
interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&clks VF610_CLK_I2C3>;
|
|
clock-names = "ipg";
|
|
dmas = <&edma0 1 38>,
|
|
<&edma0 1 39>;
|
|
dma-names = "rx","tx";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
iio-hwmon {
|
|
compatible = "iio-hwmon";
|
|
io-channels = <&adc0 16>, <&adc1 16>;
|
|
};
|
|
};
|
|
};
|