549a397652
Time for a sync with ABI/uapi headers with the upcoming v4.14 kernel.
None of the ABI changes require any source code level changes to our
existing in-kernel tooling code:
- tools/arch/s390/include/uapi/asm/kvm.h:
New KVM_S390_VM_TOD_EXT ABI, not used by in-kernel tooling.
- tools/arch/x86/include/asm/cpufeatures.h:
tools/arch/x86/include/asm/disabled-features.h:
New PCID, SME and VGIF x86 CPU feature bits defined.
- tools/include/asm-generic/hugetlb_encode.h:
tools/include/uapi/asm-generic/mman-common.h:
tools/include/uapi/linux/mman.h:
Two new madvise() flags, plus a hugetlb system call mmap flags
restructuring/extension changes.
- tools/include/uapi/drm/drm.h:
tools/include/uapi/drm/i915_drm.h:
New drm_syncobj_create flags definitions, new drm_syncobj_wait
and drm_syncobj_array ABIs. DRM_I915_PERF_* calls and a new
I915_PARAM_HAS_EXEC_FENCE_ARRAY ABI for the Intel driver.
- tools/include/uapi/linux/bpf.h:
New bpf_sock fields (::mark and ::priority), new XDP_REDIRECT
action, new kvm_ppc_smmu_info fields (::data_keys, instr_keys)
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Milian Wolff <milian.wolff@kdab.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Taeung Song <treeze.taeung@gmail.com>
Cc: Wang Nan <wangnan0@huawei.com>
Cc: Yao Jin <yao.jin@linux.intel.com>
Link: http://lkml.kernel.org/r/20170913073823.lxmi4c7ejqlfabjx@gmail.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
71 lines
2.0 KiB
C
71 lines
2.0 KiB
C
#ifndef _ASM_X86_DISABLED_FEATURES_H
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#define _ASM_X86_DISABLED_FEATURES_H
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/* These features, although they might be available in a CPU
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* will not be used because the compile options to support
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* them are not present.
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*
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* This code allows them to be checked and disabled at
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* compile time without an explicit #ifdef. Use
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* cpu_feature_enabled().
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*/
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#ifdef CONFIG_X86_INTEL_MPX
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# define DISABLE_MPX 0
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#else
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# define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31))
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#endif
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#ifdef CONFIG_X86_64
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# define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
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# define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
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# define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
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# define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
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# define DISABLE_PCID 0
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#else
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# define DISABLE_VME 0
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# define DISABLE_K6_MTRR 0
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# define DISABLE_CYRIX_ARR 0
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# define DISABLE_CENTAUR_MCR 0
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# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
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#endif /* CONFIG_X86_64 */
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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# define DISABLE_PKU 0
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# define DISABLE_OSPKE 0
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#else
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# define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
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# define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
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#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
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#ifdef CONFIG_X86_5LEVEL
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# define DISABLE_LA57 0
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#else
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# define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31))
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#endif
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/*
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* Make sure to add features to the correct mask
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*/
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#define DISABLED_MASK0 (DISABLE_VME)
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#define DISABLED_MASK1 0
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#define DISABLED_MASK2 0
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#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
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#define DISABLED_MASK4 (DISABLE_PCID)
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#define DISABLED_MASK5 0
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#define DISABLED_MASK6 0
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#define DISABLED_MASK7 0
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#define DISABLED_MASK8 0
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#define DISABLED_MASK9 (DISABLE_MPX)
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#define DISABLED_MASK10 0
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#define DISABLED_MASK11 0
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#define DISABLED_MASK12 0
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#define DISABLED_MASK13 0
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#define DISABLED_MASK14 0
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#define DISABLED_MASK15 0
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#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57)
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#define DISABLED_MASK17 0
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#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
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#endif /* _ASM_X86_DISABLED_FEATURES_H */
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