forked from Minki/linux
e872154921
This patch (as1069b) changes the way OHCI root-hub status-change interrupts are enabled. Currently a special HCD method, hub_irq_enable(), is called when the hub driver is finished using a root hub. This approach turns out to be subject to races, resulting in unnecessary polling. The patch does away with the method entirely. Instead, the driver automatically enables the RHSC interrupt when no more status changes are present. This scheme is safe with controllers using level-triggered semantics for their interrupt flags. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
364 lines
8.8 KiB
C
364 lines
8.8 KiB
C
/*
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* OHCI HCD (Host Controller Driver) for USB.
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*
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
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*
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* [ Initialisation is based on Linus' ]
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* [ uhci code and gregs ohci fragments ]
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* [ (C) Copyright 1999 Linus Torvalds ]
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* [ (C) Copyright 1999 Gregory P. Smith]
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*
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* PCI Bus Glue
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*
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* This file is licenced under the GPL.
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*/
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#ifndef CONFIG_PCI
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#error "This file is PCI bus glue. CONFIG_PCI must be defined."
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#endif
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/*-------------------------------------------------------------------------*/
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static int broken_suspend(struct usb_hcd *hcd)
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{
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device_init_wakeup(&hcd->self.root_hub->dev, 0);
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return 0;
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}
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/* AMD 756, for most chips (early revs), corrupts register
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* values on read ... so enable the vendor workaround.
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*/
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static int ohci_quirk_amd756(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci->flags = OHCI_QUIRK_AMD756;
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ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
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/* also erratum 10 (suspend/resume issues) */
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return broken_suspend(hcd);
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}
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/* Apple's OHCI driver has a lot of bizarre workarounds
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* for this chip. Evidently control and bulk lists
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* can get confused. (B&W G3 models, and ...)
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*/
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static int ohci_quirk_opti(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
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return 0;
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}
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/* Check for NSC87560. We have to look at the bridge (fn1) to
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* identify the USB (fn2). This quirk might apply to more or
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* even all NSC stuff.
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*/
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static int ohci_quirk_ns(struct usb_hcd *hcd)
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{
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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struct pci_dev *b;
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b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
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if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
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&& b->vendor == PCI_VENDOR_ID_NS) {
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci->flags |= OHCI_QUIRK_SUPERIO;
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ohci_dbg (ohci, "Using NSC SuperIO setup\n");
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}
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pci_dev_put(b);
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return 0;
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}
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/* Check for Compaq's ZFMicro chipset, which needs short
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* delays before control or bulk queues get re-activated
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* in finish_unlinks()
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*/
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static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci->flags |= OHCI_QUIRK_ZFMICRO;
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ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
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return 0;
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}
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/* Check for Toshiba SCC OHCI which has big endian registers
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* and little endian in memory data structures
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*/
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static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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/* That chip is only present in the southbridge of some
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* cell based platforms which are supposed to select
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* CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
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* that was the case though.
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*/
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#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
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ohci->flags |= OHCI_QUIRK_BE_MMIO;
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ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
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return 0;
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#else
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ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
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return -ENXIO;
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#endif
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}
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/* Check for NEC chip and apply quirk for allegedly lost interrupts.
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*/
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static void ohci_quirk_nec_worker(struct work_struct *work)
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{
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struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
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int status;
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status = ohci_init(ohci);
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if (status != 0) {
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ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
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"ohci_init", status);
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return;
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}
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status = ohci_restart(ohci);
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if (status != 0)
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ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
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"ohci_restart", status);
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}
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static int ohci_quirk_nec(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci->flags |= OHCI_QUIRK_NEC;
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INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
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ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
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return 0;
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}
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/* List of quirks for OHCI */
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static const struct pci_device_id ohci_pci_quirks[] = {
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{
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PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
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.driver_data = (unsigned long)ohci_quirk_amd756,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
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.driver_data = (unsigned long)ohci_quirk_opti,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
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.driver_data = (unsigned long)ohci_quirk_ns,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
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.driver_data = (unsigned long)ohci_quirk_zfmicro,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
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.driver_data = (unsigned long)ohci_quirk_toshiba_scc,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
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.driver_data = (unsigned long)ohci_quirk_nec,
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},
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{
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/* Toshiba portege 4000 */
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.vendor = PCI_VENDOR_ID_AL,
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.device = 0x5237,
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.subvendor = PCI_VENDOR_ID_TOSHIBA,
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.subdevice = 0x0004,
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.driver_data = (unsigned long) broken_suspend,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
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.driver_data = (unsigned long) broken_suspend,
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},
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/* FIXME for some of the early AMD 760 southbridges, OHCI
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* won't work at all. blacklist them.
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*/
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{},
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};
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static int ohci_pci_reset (struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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int ret = 0;
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if (hcd->self.controller) {
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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const struct pci_device_id *quirk_id;
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quirk_id = pci_match_id(ohci_pci_quirks, pdev);
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if (quirk_id != NULL) {
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int (*quirk)(struct usb_hcd *ohci);
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quirk = (void *)quirk_id->driver_data;
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ret = quirk(hcd);
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}
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}
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if (ret == 0) {
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ohci_hcd_init (ohci);
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return ohci_init (ohci);
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}
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return ret;
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}
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static int __devinit ohci_pci_start (struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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int ret;
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#ifdef CONFIG_PM /* avoid warnings about unused pdev */
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if (hcd->self.controller) {
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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/* RWC may not be set for add-in PCI cards, since boot
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* firmware probably ignored them. This transfers PCI
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* PM wakeup capabilities (once the PCI layer is fixed).
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*/
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if (device_may_wakeup(&pdev->dev))
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ohci->hc_control |= OHCI_CTRL_RWC;
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}
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#endif /* CONFIG_PM */
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ret = ohci_run (ohci);
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if (ret < 0) {
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ohci_err (ohci, "can't start\n");
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ohci_stop (hcd);
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}
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return ret;
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}
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#ifdef CONFIG_PM
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static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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unsigned long flags;
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int rc = 0;
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/* Root hub was already suspended. Disable irq emission and
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* mark HW unaccessible, bail out if RH has been resumed. Use
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* the spinlock to properly synchronize with possible pending
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* RH suspend or resume activity.
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*
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* This is still racy as hcd->state is manipulated outside of
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* any locks =P But that will be a different fix.
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*/
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spin_lock_irqsave (&ohci->lock, flags);
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if (hcd->state != HC_STATE_SUSPENDED) {
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rc = -EINVAL;
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goto bail;
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}
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ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
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(void)ohci_readl(ohci, &ohci->regs->intrdisable);
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/* make sure snapshot being resumed re-enumerates everything */
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if (message.event == PM_EVENT_PRETHAW)
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ohci_usb_reset(ohci);
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clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
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bail:
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spin_unlock_irqrestore (&ohci->lock, flags);
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return rc;
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}
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static int ohci_pci_resume (struct usb_hcd *hcd)
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{
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set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
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ohci_finish_controller_resume(hcd);
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return 0;
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}
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#endif /* CONFIG_PM */
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/*-------------------------------------------------------------------------*/
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static const struct hc_driver ohci_pci_hc_driver = {
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.description = hcd_name,
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.product_desc = "OHCI Host Controller",
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.hcd_priv_size = sizeof(struct ohci_hcd),
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/*
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* generic hardware linkage
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*/
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.irq = ohci_irq,
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.flags = HCD_MEMORY | HCD_USB11,
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/*
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* basic lifecycle operations
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*/
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.reset = ohci_pci_reset,
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.start = ohci_pci_start,
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.stop = ohci_stop,
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.shutdown = ohci_shutdown,
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#ifdef CONFIG_PM
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.pci_suspend = ohci_pci_suspend,
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.pci_resume = ohci_pci_resume,
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#endif
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/*
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* managing i/o requests and associated device resources
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*/
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.urb_enqueue = ohci_urb_enqueue,
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.urb_dequeue = ohci_urb_dequeue,
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.endpoint_disable = ohci_endpoint_disable,
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/*
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* scheduling support
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*/
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.get_frame_number = ohci_get_frame,
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/*
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* root hub support
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*/
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.hub_status_data = ohci_hub_status_data,
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.hub_control = ohci_hub_control,
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#ifdef CONFIG_PM
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.bus_suspend = ohci_bus_suspend,
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.bus_resume = ohci_bus_resume,
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#endif
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.start_port_reset = ohci_start_port_reset,
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};
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/*-------------------------------------------------------------------------*/
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static const struct pci_device_id pci_ids [] = { {
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/* handle any USB OHCI controller */
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PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
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.driver_data = (unsigned long) &ohci_pci_hc_driver,
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}, { /* end: all zeroes */ }
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};
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MODULE_DEVICE_TABLE (pci, pci_ids);
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/* pci driver glue; this is a "new style" PCI driver module */
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static struct pci_driver ohci_pci_driver = {
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.name = (char *) hcd_name,
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.id_table = pci_ids,
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.probe = usb_hcd_pci_probe,
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.remove = usb_hcd_pci_remove,
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#ifdef CONFIG_PM
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.suspend = usb_hcd_pci_suspend,
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.resume = usb_hcd_pci_resume,
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#endif
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.shutdown = usb_hcd_pci_shutdown,
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};
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