Jude Shih 8e6519ce2c drm/amd/display: USB4 bring up set correct address ... [Why] YELLOW_CARP_B0 address was not correct [How] Set YELLOW_CARP_B0 to 0x1A. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Jude Shih <shenshih@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-10-06 15:53:08 -04:00
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audio_types.h
bios_parser_interface.h
bios_parser_types.h	drm/amd/display: Add DP 2.0 BIOS and DMUB Support	2021-09-01 16:55:10 -04:00
dal_asic_id.h	drm/amd/display: USB4 bring up set correct address	2021-10-06 15:53:08 -04:00
dal_types.h	drm/amd/display: add cyan_skillfish display support	2021-10-04 15:22:57 -04:00
ddc_service_types.h	drm/amd/display/dc/core/dc_link_ddc: Move DP_DVI_CONVERTER_ID_{4, 5} to where they're used	2020-11-13 17:29:46 -05:00
dpcd_defs.h	drm/amd/display: Add DPCD writes at key points	2021-09-14 15:57:09 -04:00
fixed31_32.h	drm/amd/display/dc/basics/fixpt31_32: Move variables to where they're used	2020-11-10 14:27:10 -05:00
gpio_interface.h
gpio_service_interface.h	drm/amd/display/dc/gpio/gpio_service: Pass around correct dce_{version, environment} types	2021-05-27 12:33:51 -04:00
gpio_types.h
grph_object_ctrl_defs.h	drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)	2020-11-04 17:11:37 -05:00
grph_object_defs.h	drm/amd/display: Add DP 2.0 HPO Stream Encoder	2021-09-01 16:55:10 -04:00
grph_object_id.h	drm/amd/display: Add DP 2.0 HPO Stream Encoder	2021-09-01 16:55:10 -04:00
hdcp_types.h	drm/amd/display: query hdcp capability during link detect	2020-04-09 10:43:17 -04:00
i2caux_interface.h
irq_service_interface.h
link_service_types.h	drm/amd/display: Add DPCD writes at key points	2021-09-14 15:57:09 -04:00
logger_interface.h	drm/amd/dc: Kill dc_conn_log_hex_linux()	2020-04-01 14:44:59 -04:00
logger_types.h	drm/amd/display: Add DP 2.0 SST DC Support	2021-09-01 16:55:10 -04:00
set_mode_types.h
signal_types.h
vector.h