e7f1d1eef4
A read-from-write-only GICv3 access should UNDEF at EL1. But since we're in complete paranoia-land with broken CPUs, let's assume the worse and gracefully handle the case. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Christoffer Dall <cdall@linaro.org> |
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hyp | ||
vgic | ||
aarch32.c | ||
arch_timer.c | ||
arm.c | ||
mmio.c | ||
mmu.c | ||
perf.c | ||
pmu.c | ||
psci.c | ||
trace.h |