Andrew Lunn 4b8f7a11c9 ARM: MM: Add DT binding for Feroceon L2 cache ... Instantiate the L2 cache from DT. Indicate in DT where the cache control register is so that it is possible to enable/disable write through on the CPU. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>		2014-02-22 20:43:49 +00:00
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arm_timer.h	ARM: vexpress: Get rid of MMIO_P2V	2012-02-23 15:09:42 +00:00
cache-feroceon-l2.h	ARM: MM: Add DT binding for Feroceon L2 cache	2014-02-22 20:43:49 +00:00
cache-l2x0.h	ARM: 7922/1: l2x0: add Marvell Tauros3 support	2013-12-29 12:32:47 +00:00
cache-tauros2.h	ARM: cache: add extra feature enable for tauros2	2012-08-16 16:16:27 +08:00
coresight.h	ARM: hardware: fix endian-ness in <hardware/coresight.h>	2013-10-19 20:46:35 +01:00
dec21285.h	[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach	2008-08-07 09:55:48 +01:00
entry-macro-iomd.S	ARM: remove disable_fiq and arch_ret_to_user macros	2012-02-21 17:05:18 -06:00
icst.h	Update broken web addresses in arch directory.	2010-10-18 11:03:21 +02:00
ioc.h
iomd.h	[ARM] clps7500: remove support	2008-11-27 12:38:11 +00:00
iop3xx-adma.h	dmaengine: remove DMA unmap from drivers	2013-11-14 11:04:38 -08:00
iop3xx.h	ARM: plat-iop: instantiate GPIO from platform device	2013-09-20 23:04:50 +02:00
iop_adma.h	dmaengine: remove DMA unmap from drivers	2013-11-14 11:04:38 -08:00
it8152.h	ARM: PCI: provide a default bus scan implementation	2012-05-13 17:12:17 +01:00
locomo.h	[ARM] locomo: allow cascaded IRQ base to be specified by platforms	2010-03-02 07:40:50 +08:00
memc.h
sa1111.h	ARM: sa1111: move USB interface register definitions to ohci-sa1111.c	2012-03-24 11:30:12 +00:00
scoop.h	ARM: scoop: drop pcmcia_init callback	2011-07-11 14:43:32 +08:00
ssp.h
timer-sp.h	ARM: timer-sp: convert to use CLKSRC_OF init	2013-04-11 15:11:17 -05:00