Giulio Benetti e64b6afa98 drm/sun4i: Fix dclk_set_phase ...

Phase value is not shifted before writing.

Shift left of 28 bits to fit right bits

Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1519836413-35023-1-git-send-email-giulio.benetti@micronovasrl.com

2018-03-01 10:41:27 +01:00

..

drm

drm/sun4i: Fix dclk_set_phase

2018-03-01 10:41:27 +01:00

host1x

gpu: host1x: Use IOMMU groups

2017-12-21 14:52:36 +01:00

ipu-v3

gpu: ipu-v3: allow to build with COMPILE_TEST

2017-12-19 12:49:11 +01:00

vga

vfs: do bulk POLL* -> EPOLL* replacement

2018-02-11 14:34:03 -08:00

Makefile

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