e47d488935
The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds the driver that allows us to use the EBU as a PCI controller. In order for PCI to work the EBU is set to endianess swap all the data. In addition we need to make use of SWAP_IO_SPACE for device->host DMA to work. The clock of the PCI works in several modes (internal/external). If this is not configured correctly the SoC will hang. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
47 lines
933 B
C
47 lines
933 B
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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*/
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#ifndef _LANTIQ_PLATFORM_H__
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#define _LANTIQ_PLATFORM_H__
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#include <linux/mtd/partitions.h>
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/* struct used to pass info to the pci core */
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enum {
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PCI_CLOCK_INT = 0,
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PCI_CLOCK_EXT
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};
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#define PCI_EXIN0 0x0001
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#define PCI_EXIN1 0x0002
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#define PCI_EXIN2 0x0004
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#define PCI_EXIN3 0x0008
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#define PCI_EXIN4 0x0010
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#define PCI_EXIN5 0x0020
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#define PCI_EXIN_MAX 6
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#define PCI_GNT1 0x0040
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#define PCI_GNT2 0x0080
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#define PCI_GNT3 0x0100
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#define PCI_GNT4 0x0200
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#define PCI_REQ1 0x0400
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#define PCI_REQ2 0x0800
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#define PCI_REQ3 0x1000
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#define PCI_REQ4 0x2000
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#define PCI_REQ_SHIFT 10
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#define PCI_REQ_MASK 0xf
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struct ltq_pci_data {
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int clock;
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int gpio;
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int irq[16];
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};
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#endif
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