forked from Minki/linux
e39d5ef678
The GPIO controller of MPC512x is slightly different from 8xxx GPIO controllers. The register interface is the same except the external interrupt control register. The MPC512x GPIO controller differentiates between four interrupt event types and therefore provides two interrupt control registers, GPICR1 and GPICR2. GPIO[0:15] interrupt event types are configured in GPICR1 register, GPIO[16:31] - in GPICR2 register. This patch adds MPC512x speciffic set_type() callback and updates config file and comments. Additionally the gpio chip registration function is changed to use for_each_matching_node() preventing multiple registration if a node claimes compatibility with another gpio controller type. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
343 lines
9.2 KiB
Plaintext
343 lines
9.2 KiB
Plaintext
menu "Platform support"
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source "arch/powerpc/platforms/pseries/Kconfig"
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source "arch/powerpc/platforms/iseries/Kconfig"
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source "arch/powerpc/platforms/chrp/Kconfig"
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source "arch/powerpc/platforms/512x/Kconfig"
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source "arch/powerpc/platforms/52xx/Kconfig"
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source "arch/powerpc/platforms/powermac/Kconfig"
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source "arch/powerpc/platforms/prep/Kconfig"
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source "arch/powerpc/platforms/maple/Kconfig"
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source "arch/powerpc/platforms/pasemi/Kconfig"
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source "arch/powerpc/platforms/ps3/Kconfig"
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source "arch/powerpc/platforms/cell/Kconfig"
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source "arch/powerpc/platforms/8xx/Kconfig"
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source "arch/powerpc/platforms/82xx/Kconfig"
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source "arch/powerpc/platforms/83xx/Kconfig"
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source "arch/powerpc/platforms/85xx/Kconfig"
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source "arch/powerpc/platforms/86xx/Kconfig"
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source "arch/powerpc/platforms/embedded6xx/Kconfig"
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source "arch/powerpc/platforms/44x/Kconfig"
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source "arch/powerpc/platforms/40x/Kconfig"
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source "arch/powerpc/platforms/amigaone/Kconfig"
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config PPC_NATIVE
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bool
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depends on 6xx || PPC64
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help
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Support for running natively on the hardware, i.e. without
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a hypervisor. This option is not user-selectable but should
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be selected by all platforms that need it.
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config PPC_OF_BOOT_TRAMPOLINE
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bool "Support booting from Open Firmware or yaboot"
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depends on 6xx || PPC64
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default y
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help
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Support from booting from Open Firmware or yaboot using an
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Open Firmware client interface. This enables the kernel to
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communicate with open firmware to retrieve system informations
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such as the device tree.
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In case of doubt, say Y
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config UDBG_RTAS_CONSOLE
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bool "RTAS based debug console"
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depends on PPC_RTAS
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default n
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config PPC_UDBG_BEAT
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bool "BEAT based debug console"
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depends on PPC_CELLEB
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default n
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config XICS
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depends on PPC_PSERIES
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bool
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default y
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config IPIC
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bool
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default n
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config MPIC
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bool
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default n
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config MPIC_WEIRD
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bool
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default n
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config PPC_I8259
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bool
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default n
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config U3_DART
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bool
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depends on PPC64
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default n
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config PPC_RTAS
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bool
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default n
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config RTAS_ERROR_LOGGING
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bool
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depends on PPC_RTAS
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default n
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config PPC_RTAS_DAEMON
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bool
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depends on PPC_RTAS
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default n
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config RTAS_PROC
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bool "Proc interface to RTAS"
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depends on PPC_RTAS
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default y
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config RTAS_FLASH
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tristate "Firmware flash interface"
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depends on PPC64 && RTAS_PROC
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config MMIO_NVRAM
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bool
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default n
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config MPIC_U3_HT_IRQS
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bool
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depends on PPC_MAPLE
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default y
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config MPIC_BROKEN_REGREAD
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bool
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depends on MPIC
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help
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This option enables a MPIC driver workaround for some chips
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that have a bug that causes some interrupt source information
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to not read back properly. It is safe to use on other chips as
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well, but enabling it uses about 8KB of memory to keep copies
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of the register contents in software.
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config IBMVIO
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depends on PPC_PSERIES || PPC_ISERIES
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bool
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default y
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config IBMEBUS
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depends on PPC_PSERIES
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bool "Support for GX bus based adapters"
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help
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Bus device driver for GX bus based adapters.
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config PPC_MPC106
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bool
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default n
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config PPC_970_NAP
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bool
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default n
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config PPC_INDIRECT_IO
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bool
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select GENERIC_IOMAP
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default n
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config GENERIC_IOMAP
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bool
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default n
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source "drivers/cpufreq/Kconfig"
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menu "CPU Frequency drivers"
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depends on CPU_FREQ
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config CPU_FREQ_PMAC
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bool "Support for Apple PowerBooks"
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depends on ADB_PMU && PPC32
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select CPU_FREQ_TABLE
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help
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This adds support for frequency switching on Apple PowerBooks,
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this currently includes some models of iBook & Titanium
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PowerBook.
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config CPU_FREQ_PMAC64
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bool "Support for some Apple G5s"
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depends on PPC_PMAC && PPC64
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select CPU_FREQ_TABLE
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help
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This adds support for frequency switching on Apple iMac G5,
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and some of the more recent desktop G5 machines as well.
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config PPC_PASEMI_CPUFREQ
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bool "Support for PA Semi PWRficient"
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depends on PPC_PASEMI
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default y
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select CPU_FREQ_TABLE
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help
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This adds the support for frequency switching on PA Semi
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PWRficient processors.
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endmenu
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config PPC601_SYNC_FIX
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bool "Workarounds for PPC601 bugs"
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depends on 6xx && (PPC_PREP || PPC_PMAC)
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help
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Some versions of the PPC601 (the first PowerPC chip) have bugs which
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mean that extra synchronization instructions are required near
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certain instructions, typically those that make major changes to the
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CPU state. These extra instructions reduce performance slightly.
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If you say N here, these extra instructions will not be included,
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resulting in a kernel which will run faster but may not run at all
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on some systems with the PPC601 chip.
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If in doubt, say Y here.
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config TAU
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bool "On-chip CPU temperature sensor support"
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depends on 6xx
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help
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G3 and G4 processors have an on-chip temperature sensor called the
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'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
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temperature within 2-4 degrees Celsius. This option shows the current
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on-die temperature in /proc/cpuinfo if the cpu supports it.
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Unfortunately, on some chip revisions, this sensor is very inaccurate
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and in many cases, does not work at all, so don't assume the cpu
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temp is actually what /proc/cpuinfo says it is.
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config TAU_INT
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bool "Interrupt driven TAU driver (DANGEROUS)"
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depends on TAU
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---help---
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The TAU supports an interrupt driven mode which causes an interrupt
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whenever the temperature goes out of range. This is the fastest way
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to get notified the temp has exceeded a range. With this option off,
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a timer is used to re-check the temperature periodically.
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However, on some cpus it appears that the TAU interrupt hardware
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is buggy and can cause a situation which would lead unexplained hard
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lockups.
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Unless you are extending the TAU driver, or enjoy kernel/hardware
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debugging, leave this option off.
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config TAU_AVERAGE
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bool "Average high and low temp"
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depends on TAU
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---help---
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The TAU hardware can compare the temperature to an upper and lower
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bound. The default behavior is to show both the upper and lower
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bound in /proc/cpuinfo. If the range is large, the temperature is
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either changing a lot, or the TAU hardware is broken (likely on some
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G4's). If the range is small (around 4 degrees), the temperature is
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relatively stable. If you say Y here, a single temperature value,
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halfway between the upper and lower bounds, will be reported in
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/proc/cpuinfo.
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If in doubt, say N here.
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config QUICC_ENGINE
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bool "Freescale QUICC Engine (QE) Support"
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depends on FSL_SOC
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select PPC_LIB_RHEAP
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select CRC32
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help
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The QUICC Engine (QE) is a new generation of communications
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coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
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Selecting this option means that you wish to build a kernel
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for a machine with a QE coprocessor.
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config QE_GPIO
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bool "QE GPIO support"
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depends on QUICC_ENGINE
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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help
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Say Y here if you're going to use hardware that connects to the
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QE GPIOs.
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config CPM2
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bool "Enable support for the CPM2 (Communications Processor Module)"
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depends on (FSL_SOC_BOOKE && PPC32) || 8260
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select CPM
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select PPC_LIB_RHEAP
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select PPC_PCI_CHOICE
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select ARCH_REQUIRE_GPIOLIB
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select GENERIC_GPIO
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help
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The CPM2 (Communications Processor Module) is a coprocessor on
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embedded CPUs made by Freescale. Selecting this option means that
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you wish to build a kernel for a machine with a CPM2 coprocessor
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on it (826x, 827x, 8560).
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config AXON_RAM
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tristate "Axon DDR2 memory device driver"
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depends on PPC_IBM_CELL_BLADE && BLOCK
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default m
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help
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It registers one block device per Axon's DDR2 memory bank found
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on a system. Block devices are called axonram?, their major and
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minor numbers are available in /proc/devices, /proc/partitions or
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in /sys/block/axonram?/dev.
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config FSL_ULI1575
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bool
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default n
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select GENERIC_ISA_DMA
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help
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Supports for the ULI1575 PCIe south bridge that exists on some
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Freescale reference boards. The boards all use the ULI in pretty
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much the same way.
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config CPM
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bool
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select PPC_CLOCK
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config OF_RTC
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bool
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help
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Uses information from the OF or flattened device tree to instantiate
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platform devices for direct mapped RTC chips like the DS1742 or DS1743.
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source "arch/powerpc/sysdev/bestcomm/Kconfig"
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config MPC8xxx_GPIO
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bool "MPC512x/MPC8xxx GPIO support"
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depends on PPC_MPC512x || PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || \
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FSL_SOC_BOOKE || PPC_86xx
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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help
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Say Y here if you're going to use hardware that connects to the
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MPC512x/831x/834x/837x/8572/8610 GPIOs.
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config SIMPLE_GPIO
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bool "Support for simple, memory-mapped GPIO controllers"
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depends on PPC
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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help
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Say Y here to support simple, memory-mapped GPIO controllers.
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These are usually BCSRs used to control board's switches, LEDs,
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chip-selects, Ethernet/USB PHY's power and various other small
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on-board peripherals.
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config MCU_MPC8349EMITX
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tristate "MPC8349E-mITX MCU driver"
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depends on I2C && PPC_83xx
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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help
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Say Y here to enable soft power-off functionality on the Freescale
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boards with the MPC8349E-mITX-compatible MCU chips. This driver will
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also register MCU GPIOs with the generic GPIO API, so you'll able
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to use MCU pins as GPIOs.
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config XILINX_PCI
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bool "Xilinx PCI host bridge support"
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depends on PCI && XILINX_VIRTEX
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endmenu
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